Sr SOC Emulation Validation Engineer

Intel is hiring a Sr SOC Emulation Validation Engineer. Level rates it ; you can apply on Intel.

Level's read on this job

Little AI ●○○○ is how Level rates this role: aI is not part of the work.
Level classifies it as a mid-level role.
Level lists 864 other open roles at Intel.
The role was posted in the last few days.

AI in this role

Job Details:

Job Description:

The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring Intel's next-generation Client CPU System-on-Chip (SoC) designs meet functional specifications and deliver top-tier quality. You will execute verification plans, develop reusable test environments, and identify and resolve bugs in pre-silicon designs to validate functionality and performance. Your contributions will directly support the successful delivery of cutting-edge products built for the era of hyper-scale computing. Business group Intel Corporation is at the forefront of innovation, advancing technology to empower global progress. The team is part of Intel's design and development group, focused on delivering high-quality, high-performance SoC solutions for next-generation products. Through collaboration across architecture, design, and post-silicon teams, the group ensures optimized functionality and reliability for Intel's cutting-edge chips. Key Responsibilities - Develop scalable and reusable verification plans, test benches, and environments to validate functional logic for integrated SoC designs. - Execute simulations and emulation models to verify design accuracy, analyze power and performance, and uncover potential issues. - Debug failing tests, root cause issues, and implement corrective measures within pre-silicon environments. - Collaborate closely with architects, microarchitects, RTL developers, and other design teams to improve verification coverage and methodologies. - Incorporate security activities and regression tests into validation plans to ensure comprehensive protection of SoC designs. - Document test plans and drive technical reviews with cross-functional teams to optimize design verification strategies. - Absorb post-silicon feedback to enhance validation methodologies for future products.

Qualifications:

Minimum Qualifications - Bachelor's degree in Electronics, Electrical, Computer Engineering, or Computer Science with 4+ years of hands-on experience in SoC design verification OR Master's degree in Electronics, Electrical, Computer Engineering, or Computer Science with 3+ years of experience. - Proficiency in developing test plans, simulation models, and debug procedures for complex SoC designs. - Experience with verification tools such as UVM, SystemVerilog, and emulation platforms. - Strong technical expertise in RTL design and verification methodologies. - Familiarity with scripting languages (e.g., Python, Perl) for process automation. Preferred Qualifications - Ability to work collaboratively with cross-functional teams to address architectural and microarchitectural challenges. - Experience in leveraging learning from post-silicon validation to enhance pre-silicon processes. - Excellent problem-solving skills and attention to detail in identifying and resolving design issues. - Passion for innovation and continuous improvement in SoC design verification strategies. Be part of shaping cutting-edge technology and collaborate with industry leaders to deliver world-class solutions. Join us in driving the future of computing.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Malaysia, Kulim

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

Sr SOC Emulation Validation Engineer at Intel rates 27 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.