Staff High Speed Analog IC Design RD Engineer
Nokia is hiring a Staff High Speed Analog IC Design RD Engineer. Level rates it ; you can apply on Nokia.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- Level classifies it as a lead role.
- Level lists 575 other open roles at Nokia.
AI in this role
- Responsible for developing > 100Gbaud ICs for future generation products
- In charge of many aspects of IC product development, such as design, layout, and bring-up.
- Work closely with verification, CAD, product and test engineering teams to devise and conduct DVT plans and characterization.
- Experience with High-speed analog IC designs with SiGe BiCMOS or CMOS
- Knowledge of transmission lines and other high-frequency passive structures
- A good understanding of device physics and impact on analog circuits and techniques to improve performance.
- Experience with RF wafer probing, lab equipment and evaluation of high-speed analog ICs
- Familiarity with VerilogA and CAD scripting languages (Skill, python, shell scripts) would be an asset.
- Must be a team player with good verbal and written communication skills
- BS 5+ years – MS/PhD preferred
- MS 3+ years
- PhD
How we rate this
Staff High Speed Analog IC Design RD Engineer at Nokia rates 28 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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