Technical Lead – FPGA Verification (SV-UVM & DO-254)

Thales is hiring a Technical Lead – FPGA Verification (SV-UVM & DO-254) in Bengaluru, India. Level rates it ; you can apply on Thales.

Level's read on this job

On Level's scale, this role is Uses AI ●●○○: an ordinary role that requires AI tools.
The posting mentions Sv UVM, Do 254 and fpga verification among its tools and skills.
Level classes it as a lead role.
Thales has 3,600+ other open roles on Level.

AI in this role

Thales is looking for a Technical Lead for FPGA Verification to drive SV-UVM adoption, mentor engineers, and leverage AI tools.

Sv UVMDo 254

fpga-verificationasic-verificationtechnical-leadershipmentorship

Location: Bangalore, India

Thales is a global technology leader trusted by governments, institutions, and enterprises to tackle their most demanding challenges. From quantum applications and artificial intelligence to cybersecurity and 6G innovation, our solutions empower critical decisions rooted in human intelligence. Operating at the forefront of aerospace and space, cybersecurity and digital identity, we’re driven by a mission to build a future we can all trust.

Present in India since 1953, Thales is headquartered in Noida and has other operational offices and sites spread across Delhi, Gurugram, Bengaluru and Mumbai, among others. Over 2200 employees are working with Thales and its joint ventures in India. Since the beginning, Thales has been playing an essential role in India’s growth story by sharing its technologies and expertise in Defence, Aerospace and Cyber & Digital sectors. Thales has two engineering competence centres in India - one in Noida focused on Cyber & Digital business, while the one in Bengaluru focuses on hardware, software and systems engineering capabilities for both the civil and defence sectors, serving global needs. The Group has also established an MRO (Maintenance, Repair & Overhaul) facility in Gurugram to provide comprehensive avionics maintenance and repair services to Indian airlines and support the growth of the local aviation industry.

Technical Lead – FPGA Verification (SV-UVM & DO-254)

Position Overview

The Thales India Engineering Competency Center (ECCi) is seeking a Hands-on Technical Lead for FPGA IVV. This is a dual-impact role: you will act as a player and a technical coach to elevate the team's skills while remaining directly involved in the execution of complex verification activities. You will be the driving force behind our transition to SV-UVM and the guarantor of DO-254 excellence.

Qualifications

Experience: 10+ years in FPGA/ASIC Verification.

Industry: Aerospace or Defense background would be an added advantage.

Education: B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Required Skills:

Key Responsibilities:

1. Strategic Coaching & Mentorship

Technical Guidance: Provide daily coaching to the engineering team on SV-UVM best practices and advanced debugging techniques.
Skill Uplift: Adoption of latest tools, use of AI.
Best Practices: Establish and maintain high-quality coding standards for SV-UVM and documentation for DO-254.

2. Operational Execution

Environment Development: Directly architect and code critical UVM components (UVM agent, Scoreboards) and complex test scenarios.
Complex Interfaces Validation: Experience in verification of communication interfaces and bus standards (Example: AXI4, SPI, PCIe, UART, ARINC 818/664 …)
Problem Solving: Take the lead on the most challenging technical bottlenecks, from simulation mismatches to physical hardware-software integration issues.

3. Certification & Delivery (DO-254)

End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B), ensuring 100% traceability between requirements and test results.
Artifact Production: Hands-on drafting and review of critical certification documents.
Schedule & Risk: Lead technical estimation, planning, and risk mitigation for the IVV scope.

Critical Competencies

Expert SV-UVM (Active Practitioner): Current, hands-on experience in building UVM environments; not just managing them. Communication & Bus Protocols: Deep technical knowledge of AXI4, PCIe, and ARINC standards. Process Assurance: DO-254 (DAL A/B) or ISO 26262 (ASIL-D) or comparable safety standards Mentoring & Pedagogy: Ability to explain complex concepts clearly and upskill a team. Tool Mastery: Advanced user of Siemens-Questasim/Synopsys-VCS/Cadence-Xcelium/Rivera-PRO. Automation: Capable of developing Python/TCL scripts to optimize the verification flow. Project Stewardship: Ability to balance technical execution with planning and reporting.

#LI-DB3

At Thales, we’re committed to fostering a workplace where respect, trust, collaboration, and passion drive everything we do. Here, you’ll feel empowered to bring your best self, thrive in a supportive culture, and love the work you do. Join us, and be part of a team reimagining technology to create solutions that truly make a difference – for a safer, greener, and more inclusive world.

How we rate this

Technical Lead – FPGA Verification (SV-UVM & DO-254) at Thales rates 45 out of 100 for how much of the daily work is AI. That makes it Uses AI (AI Level 2 of 4). The level is about AI in the job, not seniority.

Classification

Uses AI. An ordinary role that requires AI tools.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Technical Lead – FPGA Verification (SV-UVM & DO-254) is an open job at Thales.
Level rates this role AI Level 2 of 4: Uses AI.
The role is based in Bangalore.
The job was posted on June 9, 2026.
Seniority: lead.
Applications are handled by Thales. Apply on Thales

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

FPGA VerificationAsic VerificationTechnical LeadershipMentorshipSv UVMDo 254

Questions you could be asked

Tell me about a project where fpga verification was part of your work. What did you do?
Tell me about a project where asic verification was part of your work. What did you do?
Tell me about a project where technical leadership was part of your work. What did you do?
Tell me about a project where mentorship was part of your work. What did you do?
Walk me through how you've used Sv UVM in your day-to-day work.

Adapt your resume

List these exact terms on your resume: FPGA Verification, Asic Verification, Technical Leadership, Mentorship, and Sv UVM. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
Put the AI tool in a bullet point about what you did, not just in a skills list. This role treats it as a required part of the job.

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