Applied Research Engineer, Chip Design
NVIDIA is hiring an Applied Research Engineer, Chip Design in Santa Clara, United States. It pays $192k-$305k a year and Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Builds AI ●●●● is how Level rates this role: the job is building AI systems.
- The posting mentions fine tuning among its tools and skills.
- Level classes it as a senior role.
- NVIDIA has 2,600+ other open roles on Level.
AI in this role
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years! It's an outstanding legacy of innovation that's fueled by phenomenal technology—and outstanding people! We are seeking a world-class engineer to drive applied research at the intersection of AI and ASIC design. Large language models, coding agents, and agentic AI are transforming how chips get designed, and this role puts you at the frontier — applying the latest and greatest AI to NVIDIA's real ASIC design flows and pushing past the limits of what's currently possible. Widely considered one of the technology world's most desirable employers, NVIDIA brings together forward-thinking, hardworking people inventing the future. If you're a creative, collaborative researcher who wants your work to land in real silicon on a real schedule, we want to hear from you.
What you'll be doing:
Apply LLMs, coding agents, and agentic systems - to core ASIC design problems: RTL generation, Design and Formal verification, PPA prediction and optimization.
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data, model training, coding agents, tool-using agents, and production ML systems
Deliver against NVIDIA's internal chip design schedules and activities - your success is measured by how much faster the ASIC teams move, not by research output alone.
Build robust data generation (including synthetic data) and meticulous evaluation methodology that separates working systems from demos and use evaluation to decide what to automate next.
Wire coding agents and agentic AI into EDA and validation flows — simulation, regressions, waveform and log analysis, script generation — so engineers can drive complex tasks and cut ramp time.
Push the limits of what's possible in chip design with models and research harnesses on top of open-source foundations and iterating fast from prototype to production.
Partner closely with NVIDIA's internal Nemotron team to improve our models with domain-specific data, feedback, and post-training, feeding ASIC-design expertise back into the models.
What we need to see:
MS or PhD or equivalent experience in Computer Science, Electrical/Computer Engineering, or related field.
8+ years of proven industry experience
Domain and technical expertise in front-end ASIC (design, verification, timing) combined with project experience applying agentic AI to chip design and optimization problems, with a track record of driving ideas from conception through experimentation to production.
Hands-on experience building LLM-based agents or AI tooling that real users depend on context engineering, tool integration, orchestration, and failure analysis, with a focus on evaluation.
Experience with custom model training, fine-tuning, or post-training (SFT, RLHF/DPO) over proprietary technical data.
Excellent self-motivation, creativity, and a passion for applied research, plus tight-knit collaboration skills and the ability to work effectively within a team.
Experience building and maintaining infrastructure (Docker, Slurm, CI/CD, etc.).
Excellent written and verbal communication, with proven experience presenting and explaining complex technical work.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:192,000 USD – 304,750 USD for Level 4; and 224,000 USD – 356,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.How we rate this
Applied Research Engineer, Chip Design at NVIDIA rates 98 out of 100 for how much of the daily work is AI. That makes it Builds AI (AI Level 4 of 4). The level is about AI in the job, not seniority.
Builds AI. The job is building AI systems.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Walk me through fine-tuning a model: what data did you use, and how did you check the result?
- How would you decide a model or AI system is ready to ship?
- Tell me about a time a model underperformed in production. How did you find out, and what did you change?
Adapt your resume
- List these exact terms on your resume: Fine-tuning. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
- Lead with what you built, trained or shipped. This role is judged on the AI system itself, not the tools around it.
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