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NVIDIA

ASIC Design and Verification Intern, SOC - 2027

NVIDIA is hiring an ASIC Design and Verification Intern, SOC - 2027 in Shanghai, China. Level rates it ; you can apply on NVIDIA.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • The posting mentions Verilog, SystemVerilog and Python among its tools and skills.
  • Level classes it as an internship.
  • NVIDIA has 2,700+ other open roles on Level.

AI in this role

Participate in RTL design and verification of SOC IPs while occasionally developing automation tools and AI agents to improve workflows.

verilogsystemverilogpythonperlcc
ai-agentsrtl-designasic-verificationsoc-integrationdigital-logic

The NVIDIA SOC group is looking for ASIC Design and Verification Interns to join the SysASIC and Clock teams. In this position, you will participate in the design and verification of complex reset/fuse/ism/sysctrl/boot and clock-related logic for latest NVIDIA products. You will work closely with global teams across Architecture, ASIC Design, Verification, DFT, Physical Design, Firmware, and Software.

What You’ll Be Doing:

  • Participate in RTL design and verification of SysASIC and clock-related IPs

  • Develop and debug Verilog/SystemVerilog RTL, testbenches, assertions, and simulation regressions.

  • Analyze and resolve issues from simulation, formal verification, lint, CDC/RDC, synthesis, STA, and gate-level verification.

  • Collaborate with cross-functional teams to improve design quality, verification coverage, and development efficiency.

  • Develop scripts, automation tools and AI agent to improve design and verification flows.

What We Need to See:

  • Pursuing a BS/MS degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

  • Understanding of digital logic design and front-end ASIC development flow, including RTL design, simulation, synthesis, STA, lint, and CDC/RDC.

  • Familiarity with clocking concepts, such as clock gating, clock-domain crossing, reset synchronization, PLLs, and timing fundamentals.

  • Proficiency in Verilog and/or SystemVerilog; knowledge of UVM, SVA, or functional coverage is a plus.

  • Familiarity with formal verification concepts and tools, including property specification, assertion-based verification (SVA), equivalence checking, or formal property verification

  • Experience with Python, Perl, Tcl, shell scripting, C, or C++ is preferred.

  • Familiarity with Linux development environments and common EDA tools.

  • Strong analytical and debugging skills, attention to detail, and willingness to learn.

  • Good English communication skills and the ability to work effectively in a global team.

Ways to Stand Out from the Crowd:

  • Experience through coursework, projects, or internships in RTL design, ASIC verification, Formal Verification, SOC integration, clocking, low-power design, or FPGA development.

  • Hands-on experience with UVM, assertions, functional coverage, CDC/RDC verification, STA, or gate-level simulation.

  • Experience developing automation tools or applying AI-assisted methods to design and verification workflows.

How we rate this

ASIC Design and Verification Intern, SOC - 2027 at NVIDIA rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

AI agentsRtl DesignAsic VerificationSoc IntegrationDigital LogicVerilogSystemVerilogPython

Questions you could be asked

  1. How do you decide when an AI agent can act on its own versus asking for approval first?
  2. Tell me about a project where rtl design was part of your work. What did you do?
  3. Tell me about a project where asic verification was part of your work. What did you do?
  4. Tell me about a project where soc integration was part of your work. What did you do?
  5. Tell me about a project where digital logic was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: AI agents, Rtl Design, Asic Verification, Soc Integration, and Digital Logic. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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