ASIC Engineer

Cisco is hiring an ASIC Engineer. Level rates it ; you can apply on Cisco.

Level's read on this job

Level rates this role Little AI ●○○○: aI is not part of the work.
The posting mentions UVM, MATLAB and rtl design among its tools and skills.
Level classes it as a mid-level role.
Cisco has 1,400+ other open roles on Level.
Posted within the past two weeks.

AI in this role

Develop advanced ASIC architecture, RTL design, verification environments, and post-silicon validation for networking hardware.

uvmmatlab

rtl-designasic-designverificationdebuggingpost-silicon-validation

Meet the Team

Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.
Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.

Your Impact
   •   Review micro-architecture specifications
   •   Implement Verification environment UVM based
   •   Collaborate with Design engineers to resolve bugs and achieve coverage closure
   •   Work with the firmware/Lab teams to verify chip flows
   •   Perform debug, root-cause analysis, and post-silicon validation in the lab

Minimum Qualifications
   •   B.Sc./M.Sc. in Electrical Engineering from a top university
   •   4+ years of experience in the filed
   •   knowledge with UVM and functional verification methodologies
Preferred Qualifications
   •   Experience with MATLAB simulations and bit-exact modeling environments
   •   Familiarity with mixed-signal systems and environments
   •   Knowledge and hands-on experience with Clock Domain Crossing (CDC)

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

How we rate this

ASIC Engineer at Cisco rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

ASIC Engineer is an open job at Cisco.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Caesarea, Israel.
The job was posted on October 22, 2026.
Seniority: mid.
Applications are handled by Cisco. Apply on Cisco

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Rtl DesignAsic DesignVerificationDebuggingPost Silicon ValidationUVMMATLAB

Questions you could be asked

Tell me about a project where rtl design was part of your work. What did you do?
Tell me about a project where asic design was part of your work. What did you do?
Tell me about a project where verification was part of your work. What did you do?
Tell me about a project where debugging was part of your work. What did you do?
Tell me about a project where post silicon validation was part of your work. What did you do?

Adapt your resume

List these exact terms on your resume: Rtl Design, Asic Design, Verification, Debugging, and Post Silicon Validation. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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