ASIC Physical Design Intern - 2027
NVIDIA is hiring an ASIC Physical Design Intern - 2027. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- The posting mentions Python, Tcl and Synopsys among its tools and skills.
- Level classes it as an internship.
- NVIDIA has 2,700+ other open roles on Level.
AI in this role
ASIC physical design intern to work on chip integration, synthesis, timing closure, and flow automation from RTL to tape out.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
With the continuous improvement of chip technology, design scale and performance/power ratio, the physical design of digital chips is facing outstanding challenges in high frequency, low power consumption and multiple applications. High efficiency, high quality of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD intern at NVIDIA, you'll learn and work on the tasks from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work.
What you'll be doing:
Chip integration and netlist generation, cross-team collaboration to implement chip partitioning and floorplan
Synthesis, RTL/netlist quality check, formal verification, function eco creation
Constraints creation and validation, timing budget, work with ASIC team to analyze/resolve function timing issues, achieve all special timing closure, such as io, test, clock, async etc.
Work in conjunction with PR engineers for chip implementation to achieve full chip timing closue
Develop and improve entire timing closure flow from frontend (pre-layout) to backend (post-layout), flow automation development for above areas
Methodology in any of above areas.
What we need to see:
Currently pursuing a Master's or PhD degree within a relevant or related field
Strong knowledge in IC design
Passionate about technology research and IC backend
Self-driven, good leaning ability, good teamwork
Excellent communication skill, proficient in English reading and writing
Ways to stand out from the crowd:
Experience in IC backend implementation
Hand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC)
Proficient user of Python or TCL
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!
How we rate this
ASIC Physical Design Intern - 2027 at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where asic was part of your work. What did you do?
- Tell me about a project where physical design was part of your work. What did you do?
- Tell me about a project where timing closure was part of your work. What did you do?
- Tell me about a project where synthesis was part of your work. What did you do?
- Tell me about a project where formal verification was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Asic, Physical Design, Timing Closure, Synthesis, and Formal Verification. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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