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Amazon

Design Verification Lead, Nitro Team

Amazon is hiring a Design Verification Lead, Nitro Team in Tel Aviv, Israel. Level rates it ; you can apply on Amazon.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • Tools and skills the posting cites include UVM, C and soc.
  • Level classifies it as a lead role.
  • Level lists 20,000+ other open roles at Amazon.

AI in this role

Design Verification Lead for AWS Nitro system SoC focusing on hardware-software interfaces and IO virtualization.

uvmc
sochardware-verificationembedded-softwarevirtualization
Annapurna Labs is the team behind AWS Nitro, the purpose-built system that powers the security, performance, and innovation of every EC2 instance. We operate like a start-up with the scale of the world's largest cloud provider.

We're looking for a Design Verification Team Lead - a design verification technical lead that is responsible for complex SoC sub-system, with cutting edge technology for Nitro system SoC, the foundation of AWS's virtualization, networking, and storage offload infrastructure.

It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written

It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack, with particular emphasis on networking workloads such as ENA and EFA

It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality

It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development

Key job responsibilities
- Develop and execute verification plans for IO sub-systems - covering interconnect protocols, peripheral interfaces, and system-level integration with a strong connection to networking flows (ENA/EFA)

- Verify IO sub-system features, including interconnect protocols and various accelerator engines

- Develop and debug C embedded SW as part of hardware-software integration verification

- Build and maintain UVM-based verification environments for various clusters and sub-systems

- Verify ARM advanced interconnect protocols (AMBA CHI/ACE/AXI) ensuring correct coherency transactions, performance verification, and protocol compliance

- Verify the IO virtualization SMMU/TLB operations, page table walks, translation granules, and memory attributes (cache-ability, share-ability)

- Develop constrained-random and directed test strategies targeting corner cases in IO protocol hazards, coherency races, and system boundary conditions

- Drive coverage closure using functional coverage models, assertion-based verification, and formal methods where applicable

- Contribute to performance verification - ensuring micro-architectural implementations meet performance targets alongside correctness

A day in the life
As a Design Verification Team Lead on the Nitro team, you will be responsible for leading the verification of complex SoC sub-systems, driving industry-leading verification methodologies, and ensuring our next-generation Nitro system SoC meets the highest quality bar before reaching silicon.

About the team
What Sets Us Apart?

Full system ownership - our verification leaders gain deep understanding of all system flows and the full SW stack, truly owning the technical scope from product definition through post-tapeout activities. This end-to-end ownership is what defines verification at Annapurna Labs

Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips

Cutting edge methodologies drive every stage of our verification process

Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality

We do classic functional verification (SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality

Performance optimization at all levels is at the heart of our targets on top of logical correctness verification

Our verification underpins the infrastructure that runs millions of active workloads across AWS, where networking performance and security are non-negotiable

Basic qualifications

- 8+ years of experience in design verification of complex SoC or ASIC projects
- Strong communication skills with the ability to collaborate across design, software, and physical design teams
- Proven track record leading verification of IO sub-systems, interconnect fabrics, or system-level integration blocks
- Deep expertise in UVM/SystemVerilog-based verification environments
- Experience driving verification from product definition through post-tapeout silicon validation
- Experience with performance verification methodologies alongside functional correctness

Preferred qualifications

- Strong knowledge of ARM interconnect protocols (AMBA CHI/ACE/AXI) and coherency verification
- Experience with IO virtualization verification (SMMU, TLB, page table walks, memory attributes)
- C/C++ embedded software programming and firmware-level debug skills
- Experience with hardware-software co-verification
- Familiarity with networking data paths and offload architectures
- Understanding of physical design aspects and their impact on functional verification (e.g., clock domain crossings, power-aware verification)

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

How we rate this

Design Verification Lead, Nitro Team at Amazon rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

SocHardware VerificationEmbedded SoftwareVirtualizationUVMC

Questions you could be asked

  1. Tell me about a project where soc was part of your work. What did you do?
  2. Tell me about a project where hardware verification was part of your work. What did you do?
  3. Tell me about a project where embedded software was part of your work. What did you do?
  4. Tell me about a project where virtualization was part of your work. What did you do?
  5. Walk me through how you've used UVM in your day-to-day work.

Adapt your resume

  • List these exact terms on your resume: Soc, Hardware Verification, Embedded Software, Virtualization, and UVM. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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