Failure Analysis Engineer (H/F)

About the role

As we scale chip production in our own facility, you'll monitor known and potential failure mechanisms across the production process, find their root causes, and propose the corrections that bring yield up. You'll report to the nanofabrication back-end manager and work hand in hand with managers and experts across the whole nanofabrication chain, from process development and process integration to production engineering.

Responsibilities

Generate and organize failure analysis data

• Run failure analysis on identified cases
• Build and maintain a well-organized failure analysis database
• Synthesize and share status and progress with stakeholders

Master the tools of the trade

• Electrical and visual inspection tools
• SEM (Scanning Electron Microscope)
• AFM (Atomic Force Microscope)

Build a knowledge hub around failure analysis

• Establish a network of external contacts to access failure analysis experts and test tools
• Review the state of the art in superconducting chip test tools, and advocate for new tools where they add value
• Stay current on failure analysis methodologies

Identify failure mechanisms and drive corrective action

• Identify the root causes of failures
• Point out correlations between process steps that cause failures
• Propose corrective actions on specific process steps, in coordination with the process integration, process development and production engineering teams

Requirements

• Master of Engineering (or equivalent university degree) in physics, materials science, electronics or a related field
• 5+ years of experience
• Strong knowledge of the IC fabrication process flow (front-end and back-end), able to recognize which process step could introduce a given defect
• Hands-on experience with electrical testing, and with SEM (including EDX/EDS for elemental composition) and AFM (surface topography)
• Good communication skills and a talent for cross-team cooperation
• Proficient in English
• No prior experience in quantum technologies required: failure analysis expertise from semiconductors, microelectronics or advanced materials is what matters, and we'll help you learn the superconducting side

Ideally, you also bring

• Understanding of packaging and assembly (wire bonds, flip-chip/bump bonds, TSVs)
• Knowledge of metallurgy and intermetallic compound formation
• Knowledge of fracture mechanics, fatigue, and thermal expansion (CTE mismatch) effects

Who you'll work with Internally, all QHI teams and the Chip Design Implementation team. Externally, failure analysis laboratories such as Bureau Veritas (ex-SERMA).

Recruitment Process

• Screening Call with Alexandra Talent Acquisition Specialist (30 min)
• Hiring Manager Interview with Youcef, your future manager (45 min)
• Technical case study on site (90 min) — prepared and presented on the day, nothing to do beforehand
• Leadership and Fit Interview (60 min)