FPGA Prototyping Engineer

Intel is hiring an FPGA Prototyping Engineer. Level rates it ; you can apply on Intel.

Level's read on this job

Little AI ●○○○ is how Level rates this role: aI is not part of the work.
Level classes it as a junior role.
Intel has 793 other open roles on Level.
Posted in the last few days.

AI in this role

Job Details:

Job Description:

The Role and Impact Join Intel as an Emulation Engineer and play a key role in developing and optimizing emulation and FPGA models that accelerate RTL development and enhance verification processes. In this role, you will build, test, and debug hardware and software collateral, enabling seamless presilicon verification, postsilicon validation, and software development. Your contributions will ensure efficiency and usability in emulation environments while driving advancements in Intel's technology ecosystem. Business Group As part of Intel Corporation, you'll join a dynamic team within the SPE ISCP ISV ISSP MYS FPGA organization. This group focuses on delivering cutting-edge solutions in emulation and FPGA modeling, supporting verification, validation, and software development across Intel's diverse product portfolio. Collaborating with cross-functional teams, the group plays a critical role in advancing Intel's innovation and technological leadership. Key Responsibilities - Build and optimize emulation and FPGA models from RTL designs using synthesis, partitioning, and routing tools. - Develop, integrate, test, and debug hardware and software collateral for simulation, emulation, and FPGA models. - Design and implement directed tests, hybrid emulation environments, and test environments to support hardware and software/firmware verification. - Define and develop new tools and capabilities to enhance emulation and FPGA usability. - Accelerate RTL development through improved emulation/FPGA models for presilicon verification and postsilicon validation. - Debug RTL validation failures and troubleshoot emulation platforms, interfaces, and test environments. - Provide guidance to verification teams on optimizing methodologies, test environments, and emulation efficiency. - Develop and utilize automation aids, flows, and scripts to streamline emulation utilization. - Collaborate with design, power and performance, silicon validation, and software teams in SoC and IP bring-up and debugging testbench issues.

Qualifications:

Minimum Qualifications - Bachelor's degree in Electrical and Electronics Engineering, Computer Engineering, or a related field with 0-1 years of hands-on experience in emulation and FPGA development, demonstrated through internships, academic projects, coursework, or hands-on training, OR a Master's degree in Electrical and Electronics Engineering, Computer Engineering, or a related field with no prior professional experience. - Proficiency in scripting languages like Python or Perl. - Experience in debugging RTL code using industry-standard hardware simulation/emulation/FPGA tools. Preferred Qualifications - Familiarity with System Verilog and verification methodologies. - Experience in IP or SoC validation processes. - Strong communication and collaboration skills, with a demonstrated ability to work effectively in diverse teams. We're looking for passionate individuals eager to take on new challenges, contribute to innovative projects, and grow their careers in a collaborative, forward-thinking environment. If this opportunity excites you, we encourage you to apply and embark on a journey to make a meaningful impact at Intel.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

FPGA Prototyping Engineer at Intel rates 25 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.