GPU Design Verification Engineer

Intel is hiring a GPU Design Verification Engineer. It pays $122k-$200k a year and Level rates it ; you can apply on Intel.

Level's read on this job

Little AI ●○○○ is how Level rates this role: aI is not part of the work.
Level classes it as a mid-level role.
Intel has 789 other open roles on Level.
Posted in the last few days.

AI in this role

Job Details:

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The Role and Impact
As a GPU Design Verification Engineer, you will contribute to the development of next-generation graphics components, ensuring their functionality meets rigorous specifications. You will play a pivotal role in implementing verification strategies, debugging issues, and collaborating with cross-functional teams to deliver industry-leading Graphics IP solutions. Your work will drive innovation across integrated, discrete, and data center AI applications, shaping Intel's leadership in the GPU space.

Business Group
The Graphics IP team within Intel's Data Center Group (DCG) is dedicated to delivering cutting-edge GPU technologies that support high-performance computing and AI solutions. We focus on continuous innovation, designing scalable and reusable hardware solutions used by millions globally. By collaborating across Intel, we ensure our efforts align with the company's broader goals of advancing graphics and compute capabilities.

Key Responsibilities
- Define and execute scalable IP verification plans, test benches, and validation methodologies to meet graphics microarchitecture specifications.
- Debug and resolve failing tests by identifying issues, performing root cause analysis, and implementing corrective measures in pre-silicon environments.
- Execute system simulations and analyze power, timing, and functional coverage metrics.
- Collaborate with architecture, design, and physical teams to optimize functional, performance, and power goals.
- Independently develop verification environments and ensure functional coverage closure.
- Create technical documentation, test plans, and drive reviews to ensure alignment with architectural objectives.
- Maintain and enhance verification infrastructure and methodologies for graphics logic components.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field plus 4+ years of relevant experience, or Master's degree with 3+ years of relevant experience, or PhD with no prior professional experience in:
- System Verilog and UVM for creating verification environments.
- Developing feature verification test benches and achieving functional coverage closure.
- Analytical and debugging skills in pre-silicon environments, including issue replication and resolution.
- Scripting languages such as Python.

Preferred Qualifications:
- Knowledge of GPU architecture fundamentals and 3D graphics pipeline concepts.
- Experience with industry-standard frontend design and verification tools and methodologies.
- Exposure to memory subsystem protocols (e.g., CXL, AXI, PCIe).
- Familiarity with assertion-based verification techniques.
- Experience working with emulators or FPGA for pre-silicon validation.

Join us at Intel to help engineer groundbreaking graphics technologies in an innovation-driven and collaborative environment.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

US, California, Santa Clara

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

GPU Design Verification Engineer at Intel rates 32 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.