GPU Logic Design Engineer

Intel is hiring a GPU Logic Design Engineer. It pays $142k-$200k a year and Level rates it ; you can apply on Intel.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Level classes it as a mid-level role.
Intel has 790 other open roles on Level.
Posted in the last few days.

AI in this role

Job Details:

Job Description:

As a GPU Logic Design Engineer at Intel, you will play a critical role in shaping the future of graphics and compute technologies. You will be part of a dynamic team driving innovation and delivering world-class GPU IP designs that power cutting-edge products worldwide. Your expertise will contribute directly to achieving Intel's performance, power, area, and quality goals.

This is an exciting opportunity to influence the definition and design of architecture and microarchitecture features, ensuring the seamless integration of GPU blocks into full chip designs. Your work will help redefine possibilities in graphics computation and enable extraordinary user experiences for millions.

Responsibilities will include but are not limited to:

Develop logic designs and register transfer level (RTL) coding for graphics IPs.
Define architecture and microarchitecture features for GPU blocks.
Apply advanced strategies, tools, and methods to optimize logic design for power, performance, area, timing, and physical implementation goals.
Conduct and review unit-level verification to ensure design integrity and correctness of features.
Debug failing RTL tests to implement corrective measures for features.
Collaborate with SoC customers to ensure high-quality GPU block integration.
Perform power and performance analysis and optimization to meet project goals.
Deliver technical documentation to promote effective communication and knowledge sharing.
Floating point math, e.g., float to fix, fix to float converters.
Experience in GPU validation, debug, and bringing logic designs into high-volume production.

Behavioral traits that we are looking for:

Problem-solving skills, analytical and attention to detail.
Work collaboratively in a Global team environment under ambitious schedules.
Independent, self-motivated, and well organized.
Flexible and able to operate in a fast-paced environment.

Note: This role requires regular onsite presence to fulfill essential job responsibilities.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Bachelor’s degree in Electrical, Computer engineering or related field with 4 years of Industry experience OR a Master’s degree in the same fields with 3 years of Industry experience OR PhD with 1 year of experience.
Your experience must be in the following:
- RTL design & SystemVerilog coding
- Architecture specs and convert them into low‑level design
- GPU or CPU architecture experience

Preferred Qualifications

Proven expertise in RTL design and logic development.
Knowledge of GPU architecture fundamentals and hardware design concepts.
Familiarity with microarchitecture principles and low-power design techniques.
Experience with static timing analysis tools and methods.
Demonstrated ability to debug microarchitecture and simulation issues effectively.
Understanding of Cache design.

Join us in shaping the future of technology by contributing to transformative innovations in GPU logic design. Apply today to unlock your potential and become part of our mission to create extraordinary solutions for the modern world.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

US, California, Santa Clara

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

GPU Logic Design Engineer at Intel rates 34 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.