Hardware Platform Applications Engineer - Military & Aerospace
Intel is hiring a Hardware Platform Applications Engineer - Military & Aerospace in Phoenix, United States. It pays $122k-$232k a year and Level rates it ; you can apply on Intel.
Level's read on this job
- On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
- The posting mentions Linux, hardware engineering and customer support among its tools and skills.
- Level classes it as a mid-level role.
- Intel has 807 other open roles on Level.
- Posted within the past week.
AI in this role
Engage military and aerospace customers to provide hardware platform applications support, debugging, and proof-of-concept development at Intel.
Job Description:
When you join Intel, you become part of a global organization with big ambitions. Our employees have had a profound influence on the world by creating radical innovations that revolutionize the way we live. We are driven by our purpose: To create world-changing technology that improves the life of every person on the planet. We develop technologies that bring down barriers and enable tomorrow's greatest scientific breakthroughs and cultural achievements.
In this position, you will be joining the Intel Government Technologies Customer Engineering team as a Hardware Platform Applications Engineer (PAE). This is an exciting organization with a revamped roadmap looking to expand Intel's footprint into the military and aerospace market.
In the Hardware Platform Applications Engineer role, your responsibilities would include but not be limited to:
- Directly engaging customers to provide support for customer developed systems including providing on-site power on support
- Participating in the defining and development of Proof-of-Concept systems (and demos)
- Replicating and debugging customer reported platform issues
- Development and presentation of technical collateral to customers, ecosystem providers, and the sales channel
- Working directly with platform and chipset software architects to develop and finalize platform hardware requirements
- Participate in new product and program meetings
- Participate in customer platform schematic and layout reviews
- Provide support to analysis teams in the context of field quality return issues
- Making use of laboratory measurement equipment during debug activities
- Operate Linux based machines and tools in-order-to build and flash SW components and facilitate debug activities
Core Competencies
- Demonstrated attention to detail and obsessiveness in creating best in class customer collateral
- Skills to create customer ready collateral, white papers, and training materials.
- Skills to work independently, multitask effectively, and be successful in a multi-functional team environment
- Excellent Communication Skills
Qualifications:
The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- US Citizenship required
- Ability to obtain a US Government Security Clearance
- Bachelor of Science degree in Electrical Engineering, Computer Science or in a related field of study
- 3+ years of end-to-end platform hardware (board) design experience, covering circuit design, schematic capture, platform design guideline creation, and bring-up/power-on debug
Preferred Qualifications
- Active US Government Security Clearance, with a minimum of Secret level
- Post Graduate degree in Electrical Engineering, Computer Science or in a related field of study
- Experience building technical relationships with customers
- Experience communicating technical concepts and ideas with external military and aerospace customers
- Experience leading a hardware or software power-on effort on-site with a customer, including debug of power-on boot flows and debug of CPU interfaces
- Strong lab debug skills including the ability to use lab tools including debuggers, protocol analyzers, high-speed oscilloscopes, and logic analyzers
- Experience performing signal integrity and/or power integrity simulations on customer designs
- Experience with Intel power delivery architecture and general SoC bring-up challenges
- Experience working with Government sponsor agencies and members of the Defense Industrial Base (DIB)
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, Arizona, PhoenixAdditional Locations:
US, California, Folsom, US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.How we rate this
Hardware Platform Applications Engineer - Military & Aerospace at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where hardware engineering was part of your work. What did you do?
- Tell me about a project where customer support was part of your work. What did you do?
- Tell me about a project where debugging was part of your work. What did you do?
- Tell me about a project where embedded systems was part of your work. What did you do?
- Tell me about a project where technical writing was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Hardware Engineering, Customer Support, Debugging, Embedded Systems, and Technical Writing. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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