Internship for Electronics development Wafer Stage
ASML is hiring an Internship for Electronics development Wafer Stage. Level rates it ; you can apply on ASML.
Level's read on this job
- On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
- Level classes it as an internship.
- ASML has 812 other open roles on Level.
- Posted in the last few days.
AI in this role
Introduction
The Electronics Development team at ASML is responsible for designing and improving the electronic assemblies that enable the performance of advanced lithography systems. As system complexity continues to increase, electronic components, printed circuit boards, and electronic racks become more sensitive to electromagnetic interference (EMI). Understanding when EMI occurs, how strong these disturbances are, and how they influence system behavior is essential for maintaining reliable machine performance.
In this internship you will contribute to the development of methods that distinguish real EMI-related events from background noise. Your work will support the reliability and performance of ASML’s next-generation technologies.
Your assignment
You will investigate EMI phenomena within complex electronic systems and develop algorithms that help identify meaningful interference events. You will combine signal processing, modeling, and data analysis techniques to improve the detection of EMI-related behavior. This internship offers the opportunity to work on a real engineering challenge in a high-tech environment while applying your academic knowledge to practical solutions.
Your main responsibilities will be:
- Analyze EMI-related measurement data and identify relevant signal characteristics.
- Investigate methods to distinguish true EMI events from background noise.
- Develop and evaluate software and firmware algorithms for event detection.
- Model and simulate signal behavior under different interference conditions.
- Validate algorithm performance using experimental or recorded datasets.
- Document findings and provide recommendations for future improvements.
- Present results to engineers and stakeholders within the team.
This is a master thesis internship for minimum 6 months, minimum 4 days per week (3 days on-site). The start date of this internship is as of February 2027.
Your profile
To be suitable for the internship, you:
- Are pursuing a master's degree in Electrical Engineering or a related engineering discipline.
- Have knowledge of signal processing, electromagnetic interference, or electronic system design.
- Are analytical and capable of translating complex data into clear insights.
- Are proactive and able to work independently while collaborating with others.
- Have an interest in modeling, algorithm development, and problem-solving.
- Have strong communication skills in English.
This internship is an excellent opportunity to gain experience in advanced electronics development while contributing to technology that enables the production of the world's most advanced semiconductor devices. As part of ASML, you will work alongside experienced engineers, develop valuable technical expertise, and make a meaningful contribution to innovative solutions in the semiconductor industry.
This position requires access to controlled technology, as defined in the United States Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology.
Inclusion and diversity
ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company.
Need to know more about applying for a job at ASML? Read our frequently asked questions.
How we rate this
Internship for Electronics development Wafer Stage at ASML rates 35 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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