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NVIDIA

Manager, Project Management - Chip Design

NVIDIA is hiring a Manager, Project Management - Chip Design in Tel Aviv, Israel. Level rates it ; you can apply on NVIDIA.

Level's read on this job

  • Little AI ●○○○ is how Level rates this project manager role: aI is not part of the work.
  • Tools and skills the posting cites include Verilog, UVM and SystemVerilog.
  • Level classifies it as a lead role.
  • Level lists 2,700+ other open roles at NVIDIA.

AI in this role

Lead pre-silicon development and project management for next-generation switch ASICs from concept to tape-out.

veriloguvmsystemverilog

NVIDIA's Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs — from concept to tape-out — and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.


What you'll be doing:

  • Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
  • Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
  • Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
  • Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.

What we need to see:

  • BS or MS in Computer or Electrical Engineering, or equivalent experience.
  • 10+ overall years of experience in chip design.
  • 5+ years of chip design/verification management experience as a second- or third-level manager, leading organizations of 50+ engineers.
  • Proficiency in RTL design (Verilog), verification (UVM, SystemVerilog), System-On-Chip design/integration flow, and design automation.
  • Strong system view with the ability to collaborate across multiple interfaces.
  • Strong analytical and problem-solving skills.
  • Excellent communication and teamwork abilities.
  • Experience in synthesis and physical design is a plus.

How we rate this

Manager, Project Management - Chip Design at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

VerilogUVMSystemVerilog

Also common in project manager jobs at this level

Pay

Typical project manager job
$111k

This posting doesn't list pay. Use the typical project manager figure when pay comes up. See project manager jobs

Questions you could be asked

  1. What's a project where you used Verilog hands-on?
  2. Walk me through how you've used UVM in your day-to-day work.
  3. What are the limits of SystemVerilog that you've run into, and how did you work around them?

Adapt your resume

  • List these exact terms on your resume: Verilog, UVM, and SystemVerilog. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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