Samsung ElectronicsRTL Design Engineer
Samsung Electronics is hiring an RTL Design Engineer in Bengaluru, India. Level rates it ; you can apply on Samsung Electronics.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- The posting mentions Verilog, SystemVerilog and Design Compiler among its tools and skills.
- Level classes it as a senior role.
- Samsung Electronics has 596 other open roles on Level.
AI in this role
Design low-power RTL microarchitectures and ASICs with optional focus on AI and near-memory acceleration hardware.
Position Summary
About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities
- At least 6-10 years of experience in Low power RTL design, microarchitecture, synthesis, timing closure, power estimation. Should be proficient in Verilog/System Verilog.
- Should have experience in optimization of microarchitecture and RTL for area and power reduction. Experience with SoC integration, optimization of Arithmetic units, Floating point data path design is a plus.
- Should have experience using ASIC design tools such as VCS, Verdi, Design Compiler, power estimation tools(such as Spyglass, PTPX). Knowledge of scripting languages (Shell, Perl, Python), C language is a plus.
- Experience with signing off RTL, synthesized netlist for Physical Design and eventually tape-out is desirable.
- Hands on experience with AXI, APB bus protocols is a must. Experience with PCIe, UCIe protocols is a plus.
- Prior domain experience in Artificial Intelligence and/or Near Memory acceleration is a plus.
- Experience with hardware architecture exploration, performance modeling is desirable.
- *PPA - Power Performance, & Area analysis
Skills and Qualifications
Experience – 6 to 10 Years of experience
Qualifications
- B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.
How we rate this
RTL Design Engineer at Samsung Electronics rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where rtl design was part of your work. What did you do?
- Tell me about a project where microarchitecture was part of your work. What did you do?
- Tell me about a project where asic was part of your work. What did you do?
- Tell me about a project where power optimization was part of your work. What did you do?
- Tell me about a project where soc integration was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Rtl Design, Microarchitecture, Asic, Power Optimization, and Soc Integration. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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