Senior ATE Wafer Test Engineer

Nokia is hiring a Senior ATE Wafer Test Engineer. Level rates it ; you can apply on Nokia.

Level's read on this job

Level rates this role Little AI ●○○○: aI is not part of the work.
Level classes it as a senior role.
Nokia has 568 other open roles on Level.

AI in this role

Description:

Sr Analog Wafer Level ATE Test Engineer to support existing IC ATE development and production
Experience with Analog ATE wafer sort testing and STDF data handling is required.
Knowledge of automated test equipment (ATE) platforms, probe card development, software and hardware for wafer level testing.
The candidate is expected to have hands on experience with NPI test development, WS production yield analysis and yield drop out debug and disposition.
Familiar & comfortable with high-performance medium volume ASICs, production environment
Ability to write status reports, schedules and project plans and present results in general meeting formats.
Capable to contact vendors for project schedule, testing status, booking equipment, and test debugging
Collection, analysis, correlation and interpretation of data using statistical techniques and industry standard tools is required
Some experience with scripting and simple programming skills.
Critical thinking skills to debug and solve problems required
Experienced with scheduling and planning projects with external vendors and customers
RF ATE testing experience is a plus

Responsibilities:

Interface with external vendors for R&D and production testing
Ensure and correlate test SW and HW to written Test Plan
Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking
Wafer level ATE platform support of production, yield analysis, failure Paretos and yield improvement
Production logistics including ASIC wafer tracking and travelers
Supporting engineering releases through pilot runs and production
Develop, debug and release production methods and procedures to improve efficiency and yield compliant to TL/ISO manufacturing standards

Experience Required:

BS EE/physics with 5+ years industrial experience
Analog wafer level IC testing
Must have experience with probe card cleaning, maintenance and debug
Must have experience with ATE platform and wafer prober setup and operation
Must be able to assemble coherent and concise reports summarizing status and next steps
Must be able to effectively present findings to a cross-functional, collaborative team environment
Prefer experience with Galaxy or JMP data analysis tools.
Prefer Advantest 93K expertise including calibration, TL/ISO compliance and ESD compliance
Prefer expertise with Perl, VB, SQL and Perforce
Prefer UNIX/Linux experience

Skills Required:

Proficient interacting with design and application engineers
Strong debug and analytical skills
Self-motivated team player
Strong time and project management skills
Detail oriented with all aspects of technical work and vendor interactions

Excellent verbal and written communication skills

How we rate this

Senior ATE Wafer Test Engineer at Nokia rates 36 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.