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Senior Chip Design Engineer , Graviton

Amazon is hiring a Senior Chip Design Engineer , Graviton in Haifa, Israel. Level rates it ; you can apply on Amazon.

Level's read on this job

  • Little AI ●○○○ is how Level rates this role: aI is not part of the work.
  • Tools and skills the posting cites include Verilog, SystemVerilog and rtl design.
  • Level classifies it as a senior role.
  • Level lists 20,000+ other open roles at Amazon.

AI in this role

Design and lead semiconductor architecture and SoC development for the AWS Graviton processor line.

verilogsystemverilog
rtl-designsoc-designasichardware-architecture
Annapurna Labs is a fabless semiconductor company founded by industry veterans. We develop leading-edge products on state-of-the-art process technologies, and we're looking for talented engineers to help us build a semiconductor platform based on a revolutionary architecture.
You'll help develop state-of-the-art products within a disruptive system architecture, working on the technologies that power the world's largest cloud provider in a dynamic, open and fast-paced environment. AWS provides a highly reliable, scalable, low-cost cloud infrastructure platform that powers hundreds of thousands of businesses in 190 countries.

AWS Graviton is a family of processors designed to deliver the best price performance for cloud workloads running in Amazon Elastic Compute Cloud (Amazon EC2). Graviton is designed in-house. It has reshaped what EC2 offers AWS customers and has become their preferred choice for cloud compute.
You'll join the Chip Design team on the Graviton product line. The team defines the product's features and owns their architecture and development. We work closely with product definition, pre- and post-silicon validation, physical design, software and other teams across the full chip development cycle, from idea to mass production. Your design will ship in Graviton products deployed in AWS data centers worldwide, so your work will have large-scale impact.
At Annapurna Labs, you'll play a key role in developing the next generation of semiconductor platforms for the world's largest cloud infrastructure, and in shaping the future of cloud computing.

Watch these videos to learn more about Annapurna Labs and the Graviton project:

* AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0
* AWS re:Invent 2025 - AWS Graviton: https://www.youtube.com/watch?v=haSHl2BLhm8



Key job responsibilities
Act as the technical lead for a major SoC domain across its full lifecycle, from feature definition through tape-out and silicon bring-up
Work with Product Definition and Architecture to turn product requirements into feature specifications for your domain
Lead micro-architecture definition and own power, performance and area trade-offs, working with Physical Design and Software
Drive RTL design in Verilog/SystemVerilog and lead design reviews for the domain
Define and execute IP integration strategies
Set verification priorities with the Verification and Emulation teams, and lead system-level and post-silicon debug for your domain
Carry design learnings into the next Graviton generations, and improve design methodology and flows
Mentor and technically guide engineers working in your domain, raising the technical bar of the team

About the team
Annapurna Labs started in 2011, as a fabless chip start-up, focused on bringing innovation to the fast-growing cloud infrastructure. Four years after its inception, Annapurna Labs was acquired by Amazon Web Services (AWS). Since then, we have accelerated innovation and developed a number of products that benefit cloud customers, including AWS Nitro technology, AWS Graviton processors, AWS ML Inferentia & Trainium and more. Although Annapurna Labs is a small company, it is significant for AWS, with a reputation of being the key ingredient in the "secret sauce" behind its success. The Annapurna Labs team is responsible for building custom chips, accelerators, and software stacks that run on top of them, which gives us the possibility to optimize and improve our products in different layers more effectively.
We are a dynamic group of engineers dedicated to pushing the boundaries of semiconductor innovation. Our team combines the agility of a startup with the resources of Amazon Web Services, creating a unique environment where breakthrough technologies are born. We collaborate across disciplines, from product definition to silicon validation, ensuring each chip represents the pinnacle of performance and reliability.

Basic qualifications

- 5+ years of experience in Chip Design
- Track record of owning a design domain from specification through tape-out
- Proficient in Verilog/SystemVerilog
- B.Sc. degree in Computer Engineering/Computer Science/Electrical Engineering
- Strong technical communication and mentoring capabilities
- Ability to lead technical work across teams and influence design decisions

Preferred qualifications

- M.Sc. in a technical-related field
- Experience across multiple tape-outs, including post-silicon bring-up and debug
- Experience defining architecture and micro-architecture for complex SoC features
- Experience with IP integration and full chip development
- Protocols: PCIe, DDR, AXI, CHI, Ethernet
- Hands-on design experience with hardware support for virtualization and IO virtualization (e.g., hypervisors, Arm virtualization extensions, two-stage address translation, IOMMU/SMMU)

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

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How we rate this

Senior Chip Design Engineer , Graviton at Amazon rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

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Skills and AI tools this role asks for

Rtl DesignSoc DesignAsicHardware ArchitectureVerilogSystemVerilog

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