AmazonSenior Formal Verification Engineer, Annapurna Labs
Amazon is hiring a Senior Formal Verification Engineer, Annapurna Labs in Haifa, Israel. Level rates it ; you can apply on Amazon.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- The posting mentions SystemVerilog, Formal Verification and hardware verification among its tools and skills.
- Level classes it as a lead role.
- Amazon has 20,000+ other open roles on Level.
AI in this role
Lead formal verification strategy for AWS silicon subsystems with minor exposure to applying AI flows to verification.
Working for Annapurna Labs is thrilling, fast-paced, and a constant learning experience.
Formal verification is everywhere in our projects. Each project has hundreds of formal environments. They range from small blocks with sophisticated data crunching or complex FSMs up to large systems, including chip-fabric deadlock verification.
The Role:
As an L6 Formal Verification Engineer, you'll be the official technical lead and own the FV strategy for a specific subsystem across Graviton and Nitro. You'll distribute work, review from strategy through sign-off, and mentor the engineers on your team. You'll also help shape the FV methodologies the whole team uses.
Your Ideas Shape the Team:
We constantly improve our methods, and any good idea can change how we verify. There are no limits on what formal verification can influence, or on how you can influence formal verification. Senior engineers on our team are co-inventors on formal verification technology patents.
Key job responsibilities
Own the formal verification strategy for a specific subsystem.
Lead a team of FV engineers technically, from work distribution and reviews through sign-off.
Mentor engineers and grow their formal expertise.
Drive and evolve team-wide formal methodologies.
Build and apply AI and agentic flows in formal verification.
Work closely with design teams to define verification intent and improve design quality.
A day in the life
What We Offer:
* Broad influence on almost every aspect of how the team works
* AI and agentic flows built into how we do formal verification
* A true engineering partnership with design, including joint patents
*The chance to apply formal to Graviton and Nitro, from complex blocks to full-fabric deadlock problems
Basic qualifications
- Bachelor's degree in Electrical Engineering, Computer Science, or a related field
- 8+ years of hands-on formal verification Expert knowledge of SystemVerilog Assertions (SVA)
- Hands-on expertise with industry formal tools (any vendor)
- Experience owning formal verification of complex designs through sign-off
Preferred qualifications
- Abstraction and complexity reduction techniques
- Cover-based and semi-formal verification, and helper assertions
- Protocol knowledge: AXI, CHI, networking
- Familiarity with AI/ML applications in verification
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
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How we rate this
Senior Formal Verification Engineer, Annapurna Labs at Amazon rates 25 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where hardware verification was part of your work. What did you do?
- Tell me about a project where team leadership was part of your work. What did you do?
- Tell me about a project where chip design was part of your work. What did you do?
- What's a project where you used SystemVerilog hands-on?
- Walk me through how you've used Formal Verification in your day-to-day work.
Adapt your resume
- List these exact terms on your resume: Hardware Verification, Team Leadership, Chip Design, SystemVerilog, and Formal Verification. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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