Senior Package Layout Engineer

NVIDIA is hiring a Senior Package Layout Engineer. Level rates it ; you can apply on NVIDIA.

Level's read on this job

Level rates this role Little AI ●○○○: aI is not part of the work.
The posting mentions Cadence Apd, Sipl and Cadence Virtuoso among its tools and skills.
Level classes it as a senior role.
NVIDIA has 2,600+ other open roles on Level.

AI in this role

Senior package layout engineer responsible for designing complex high-speed IC substrates and interconnect systems for datacenters.

cadence-apdsiplcadence-virtuosoansys

ic-packagingpcb-layoutsignal-integrityhardware-design

NVIDIA Networking unit has continuously reinvented itself over two decades. Our high-speed products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, we are increasingly known as the place for getting “End-to-End High-Speed Ethernet and InfiniBand Solutions. We're looking to grow our company and build our teams with smart people who can join us at the forefront of technological advancement. NVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team. and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products.

What you'll be doing:

As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages.
Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools.
Optimize package pin out incorporating system level trade-offs of pins assignment.
Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.
In close co-operation with the SI/PI/HW design teams and product teams
Planning, ensuring stakeholder management and leading projects from start to finish

What we need to see:

B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience
5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices.
Experience in substrate layout of wire bond and flip chip packages, preferred
Knowledge in substrates or board manufacturing process
Significant background with Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools

Ways to stand out in the crowd:

Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools
Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting)

NVIDIA have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

How we rate this

Senior Package Layout Engineer at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior Package Layout Engineer is an open job at NVIDIA.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Israel, Yokneam.
The job was posted on September 28, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Ic PackagingPcb LayoutSignal IntegrityHardware DesignCadence ApdSiplCadence VirtuosoAnsys

Questions you could be asked

Tell me about a project where ic packaging was part of your work. What did you do?
Tell me about a project where pcb layout was part of your work. What did you do?
Tell me about a project where signal integrity was part of your work. What did you do?
Tell me about a project where hardware design was part of your work. What did you do?
Walk me through how you've used Cadence Apd in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Ic Packaging, Pcb Layout, Signal Integrity, Hardware Design, and Cadence Apd. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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