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Nokia

Senior Packaging Development Engineer

Nokia is hiring a Senior Packaging Development Engineer. Level rates it ; you can apply on Nokia.

Level's read on this job

  • Level rates this role Little AI ●○○○: aI is not part of the work.
  • Level classes it as a senior role.
  • Nokia has 568 other open roles on Level.

AI in this role

Are you passionate about pushing the boundaries of optical package design? We're seeking a talented and driven Packaging Development Engineer to lead the development of next-generation packaging solutions. In this role, you'll be at the forefront of innovation, collaborating with cross-functional teams to optimize electrical assembly and RF signal efficiency and ensure seamless transition to mass production. If you're eager to own the design and development of flip chip, fan out, semiconductor dicing, and reflow processes, while staying abreast of cutting-edge technologies, we encourage you to apply!

  • Lead next generation Silicon Photonics package design in collaboration with cross-functional teams, stakeholders and vendors to ensure package requirements are met.
  • Own all the development of all the advanced packaging activities and designs: flip chip, reflow, fanout, thermo-compression bonding, underfill, hot bar soldering, wirebonding, etc…
  • Optimize the assembly of electrical and optical engines and apply Design for Manufacturing principles to meet production volumes and cost targets.
  • Survey advanced SiPh packaging solutions, materials and vendors to stay current with new technological advancements.
  • Own and maintain the process and the manufacturing documentation, along with Bill of Materials for new products.
  • Drive package debug activities during product validation and qualification.
  • Support the development activities at our Contract Manufacturers, both remotely and on-site to ensure a smooth transition to mass production.

You have:

  • 5-8 years of experience in high-speed electronics and Silicon Photonics package design.
  • Experience with flip chip, fanout, thermo-compression bonding, underfill, hot bar soldering, wirebonding, die attach.
  • Experience in microelectronics, optoelectronics packaging design and assembly.
  • Knowledgeable in packaging technologies and processes, with glass/ceramic/metal material properties and multilayer materials interfaces after bonding.
  • Experience in high-volume packaging of optical transceivers, co-packaged optics, multi-chips module, pluggables, 2.5/ 3D packages.
  • Experience with documentation of fabrication, inspection, and assembly processes.
  • Solid interpersonal, communication and problem-solving skills in order to interact with engineering staff, external vendors and contractors effectively.
  • Experience with package and process design/development from design to production.
  • Experience with metrology techniques such as SEM/XSEM, confocal microscopy, or acoustic imaging - or equivalent practical work experience.
     

It would be nice if you also have:

  • Familiar with optical coupling, fiber pigtail and free space optics.
  • Knowledgeable in materials properties and process, yield analysis and enhancement, failure mode and analysis, quality tools (such as DOE, SPC and Six-Sigma process and analysis).
  • Familiar with Industry Test Standard, such as JEDEC, EIA, Telcordia, Mil-Std, etc.
  • Knowledge of material properties and associated mechanical part fabrication processes.

How we rate this

Senior Packaging Development Engineer at Nokia rates 34 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

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