Level

Cisco

Senior Physical Design Engineer - Signoff Methodology

AI in this role

This is a hybrid role with four days per week at Cisco’s Yerevan office.

Meet the Team

You'll be joining our CAD Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This team is a critical part of the group leading the development of high-quality VLSI designs and supports the creation of advanced silicon. Our design center brings together all silicon hardware and software development fields, encouraging collaboration and technical excellence.

Your Impact

As part of our team, you’ll help develop and improve flows for all signoff disciplines and contribute to the evolution of implementation tool flows. You’ll play a key role in enabling the delivery of high-performance, large-scale, and complex devices that push the boundaries of what’s possible in chip design.

  • Develop and refine backend methodologies and flows from RTL to GDS, supporting high-quality VLSI design.

  • Contribute to the advancement of all signoff flows, including physical synthesis, place and route, power optimization, timing closure, and physical closure.

  • Collaborate with engineering teams to support and enhance implementation tool flows.

  • Work with advanced silicon technologies and processes to deliver complex and reliable devices.

Minimum Requirements

  • 5+ years of experience as a CAD Physical Design Engineer with PnR and STA or as a  Design Engineer with strong backend design experience.

  • B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or a related field.

  • Strong understanding of STA flows.

  • Familiarity with PnR, physical verification (PV), and formal verification (FV).

Preferred Qualifications

  • Experience in Physical Design CAD, especially with industry-standard EDA tools such as Synopsys or Cadence.

  • Ability to work both independently and within a team.

  • Strong self-learning skills and effective communication.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

How we score this

Senior Physical Design Engineer - Signoff Methodology at Cisco scores 26 out of 100 on AI centrality, which makes it AI Level 1 of 4 (Little AI) on this board. The level measures how much of the work is AI, not seniority.

Classification

AI Level 1. The work itself involves no AI, or AI only appears as scenery, such as a company tagline.

  1. AI Level 480 to 100
  2. AI Level 360 to 79
  3. AI Level 240 to 59
  4. AI Level 10 to 39

Bands come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.

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