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NVIDIA

Senior Verification Engineer – High Speed Coherent Interconnect Hub

NVIDIA is hiring a Senior Verification Engineer – High Speed Coherent Interconnect Hub in Toronto, Canada. It pays CAD 125k-CAD 175k a year and Level rates it ; you can apply on NVIDIA.

Level's read on this job

  • On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
  • The posting mentions SystemVerilog, UVM and Python among its tools and skills.
  • Level classes it as a senior role.
  • NVIDIA has 2,600+ other open roles on Level.
  • Posted within the past two weeks.

AI in this role

Verify complex High Speed Coherent Interconnect Hub IPs for next-generation scalable multi-chip computing platforms.

systemveriloguvmpythonperl

NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next generation of scalable, high-performance, multi-chip computing platforms. In this role, you will work closely with architecture and design teams to verify complex High Speed Coherent Interconnect Hub IP. You will help define verification strategies, develop robust verification environments, drive functional and performance verification, close coverage, and ensure high-quality design signoff. This position provides an opportunity to work on technologies at the heart of NVIDIA's next-generation computing platforms.


What You’ll Be Doing:

  • Develop and maintain verification infrastructure, including testbenches, BFMs, checkers, monitors, scoreboards, assertions, and constrained-random stimulus.
  • Define, review, and complete verification test plans for coherency protocol, ordering, error handling, performance, and other key IP features.
  • Verify protocol compliance and interoperability across complex SoC and multi-chip interfaces.
  • Develop and complete performance test plans to validate bandwidth, latency, QoS, and other performance requirements.
  • Drive functional and code coverage closure and toward verification signoff.
  • Debug complex RTL and verification issues and work closely with architecture and design teams to drive them to resolution.
  • Collaborate with FPGA, emulation, software, and post-silicon teams to support system validation and silicon bring-up.

What We Need to See:

  • BS / MS or equivalent experience.
  • 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
  • Strong background in SystemVerilog, UVM, constrained-random verification, and coverage-driven verification methodologies.
  • Experience developing verification environments, checkers, assertions, and functional coverage.
  • Strong debugging and problem-solving skills with experience using industry-standard simulation and debug tools.

Ways to Stand Out from the Crowd:

  • Experience verifying high-speed coherent interconnects, NoCs, or other complex SoC infrastructure IP.
  • Knowledge of coherent interconnect protocols and technologies such as CHI and AXI.
  • Strong understanding of cache coherency, transaction ordering, and system-level data flows.
  • Experience with performance verification, including bandwidth, latency, QoS, and traffic management.
  • Strong scripting skills in Python, Perl, or Shell, along with excellent communication and collaboration skills.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology?


#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
125,000 CAD – 175,000 CAD for Level 3; and 155,000 CAD – 205,000 CAD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

How we rate this

Senior Verification Engineer – High Speed Coherent Interconnect Hub at NVIDIA rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

SystemVerilogUVMPythonPerl

Questions you could be asked

  1. What's a project where you used SystemVerilog hands-on?
  2. Walk me through how you've used UVM in your day-to-day work.
  3. What are the limits of Python that you've run into, and how did you work around them?
  4. What's a project where you used Perl hands-on?

Adapt your resume

  • List these exact terms on your resume: SystemVerilog, UVM, Python, and Perl. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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