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Nokia

Staff Hardware Development Engineer - High Speed Board Design

Nokia is hiring a Staff Hardware Development Engineer - High Speed Board Design. Level rates it ; you can apply on Nokia.

Level's read on this job

  • On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
  • Level classifies it as a lead role.
  • Level lists 568 other open roles at Nokia.
  • The role was posted within the past two weeks.

AI in this role

The Staff Hardware Development Engineer will be a key member of our team, responsible for designing and developing high-performance hardware solutions. With a focus on board design, testing, and debugging, this role requires a strong understanding of EDA tools and hands-on experience in lab activities. The successful candidate will have the opportunity to work on innovative projects and contribute to the development of cutting-edge technology.

NILightpath

  • Own hardware development across the full product lifecycle, including concept definition, architecture, detailed design, prototype bring-up, verification, qualification, production introduction, sustaining engineering, and field issue resolution.
  • Design and develop high-speed analog and mixed-signal circuits, including laser drivers, modulator drivers, transimpedance amplifiers (TIAs), bias control circuits, clocking and PLL solutions, ADC/DAC interfaces, and low-noise power delivery systems.
  • Develop high-speed PCB designs for 112G/224G PAM4 and coherent optical applications, including stack-up definition, impedance control, length matching, via and back-drill strategies, and connector selection.
  • Apply expertise in analog and mixed-signal circuit design, including amplifiers, filters, data converters, PLLs, low-noise design techniques, and power management architectures.
  • Utilize knowledge of high-speed serial interfaces, such as 56G/112G/224G PAM4, CEI, and OIF standards, as well as an understanding of coherent modulation concepts including QPSK, 16QAM, phase recovery, and frequency recovery.
  • Apply RF and microwave fundamentals, including S-parameters, matching networks, noise figure, linearity, signal integrity, and clock distribution principles.
  • Drive design-for-manufacturability (DFM), design-for-assembly (DFA), design-for-testability (DFT), reliability, serviceability, and cost optimization initiatives throughout the product lifecycle.
  • Collaborate with signal integrity and power integrity specialists to perform SI/PI analysis and channel modeling, including S-parameter characterization, loss and crosstalk assessment, jitter and noise analysis, and power delivery network optimization for coherent DSP and high-speed SerDes applications.
  • Analyze and address deterministic and random jitter, phase noise, clock quality, noise coupling mechanisms, equalization requirements, and timing margin considerations in high-speed systems.
  • Partner with cross-functional teams, including system architects, software engineers, product managers, manufacturing engineers, and validation teams, to ensure successful product integration and delivery.
  • Stay current with emerging technologies, industry standards, and AI-enabled engineering practices. Drive innovation through the adoption of modern design methodologies, automation, and data-driven insights to accelerate product development and improve product quality.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 10+ years of experience in high-board design, testing, and debugging.
  • Proficiency in EDA tools and hands-on experience in lab activities.
  • Strong knowledge of hardware design principles and best practices.
  • Experience with hardware debugging and troubleshooting techniques.
  • Familiarity with industry-standard design tools and simulation software.
  • Excellent problem-solving and analytical skills.
  • Ability to work independently and manage multiple projects simultaneously.
  • Effective communication and collaboration skills.
  • Willingness to learn and adapt to new technologies and industry trends.

How we rate this

Staff Hardware Development Engineer - High Speed Board Design at Nokia rates 22 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

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