ASIC Digital Physical Design Engineer
Nordic Semiconductor is hiring an ASIC Digital Physical Design Engineer in Bristol, Stockholm and Tampere. Level rates it ; you can apply on Nordic Semiconductor.
Level's read on this job
- On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
- Nordic Semiconductor has 41 other open roles on Level.
AI in this role
About the job
As a Physical Design Engineer, you will play a key role in transforming advanced semiconductor designs into high-performance, manufacturable silicon products. Working at the heart of the chip implementation flow, you will drive critical physical design activities from floorplanning and power implementation through place-and-route, timing closure, physical verification, and final tape-out. This is a unique opportunity to work on cutting-edge technology, solve complex engineering challenges, and influence the development of next-generation low-power semiconductor solutions.
You will collaborate closely with talented design, architecture, verification, and silicon teams while helping shape future methodologies, automation flows, and AI-assisted design practices. If you are passionate about delivering high-quality silicon, enjoy tackling difficult technical problems, and want to see your work make its way into real-world products, this is the role for you!
Key responsibilities
Floorplanning activities, including macro placement, partitioning, and voltage area definition
Develop and implement robust power distribution networks
Execute Place & Route activities, including clock tree synthesis (CTS), congestion optimization, signal integrity improvements, and timing closure
Perform comprehensive physical verification and signoff activities, ensuring designs meet foundry requirements and are ready for successful tape-out
Analyze and optimize power integrity through IR-drop, electromigration, and reliability assessments, identifying and resolving issues that could impact silicon performance or long-term product reliability
Drive ECOs and late-stage design optimizations, implementing efficient fixes while maintaining schedule commitments and achieving timing closure across all operating modes and corners.
Support silicon bring-up and tape-out activities by providing physical design expertise, debugging implementation issues
Contribute to the development and enhancement of physical design flows, automation scripts, and implementation methodologies to improve productivity, quality, and design scalability across future projects
Key Qualifications
BSc/MSc in Electronics Engineering or similar
Several years of experience in chip implementation
Experience of relevant Synopsys and Cadence IC implementation and signoff tools
Contribution to flow development and setup
Knowledge of scripting languages like TCL, Perl, Python or similar
Experience using AI-assisted tools to improve design productivity (e.g. AI-driven EDA flows, code/script generation, debug assistance)
Excellent written and verbal communication skills in English
Personal Skills
The ideal candidate is a detail-oriented engineer who thrives on solving complex technical challenges and takes pride in delivering high-quality silicon. With a structured and analytical mindset, you can navigate intricate physical design issues, balance competing priorities, and maintain focus on achieving demanding performance, power, area, and schedule targets. You enjoy digging into root causes, finding efficient solutions, and continuously improving design methodologies, flows, and tools.
You combine independent ownership with a collaborative mindset, enabling you to drive tasks forward while contributing to a highly skilled and supportive team environment. Curious by nature, you embrace new technologies, including AI-assisted engineering tools, and are motivated by the opportunity to learn, innovate, and help shape the next generation of cutting-edge semiconductor products.
Working for Nordic
Working at Nordic, you will be inspired and supported to develop yourself. Our teams enjoy a professional and informal working environment. We value and encourage the continuous development of skills and expertise to the highest levels. We are proud of our Norwegian heritage, our highly skilled international workforce, and our world-leading innovation.
We offer a variety of tasks and projects, and the possibility to work alongside some of the world’s most renowned experts within their field. We encourage our employees to question the established and innovate while expecting professionalism, commitment, and the will to learn.
Benefits
Competitive salary with short- and long-term incentive plan
Flexible working hours
Medical insurance
Family-friendly policies, insurances, and benefits
Practical details
Location: Bristol, UK | Stockholm, Sweden | Tampere, Finland
Please note that this position might be subject to a background check.
How we rate this
ASIC Digital Physical Design Engineer at Nordic Semiconductor rates 33 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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