ASIC Engineer – (New Grad) - India Cisco CAG UHR (Evergreen)
Cisco is hiring an ASIC Engineer – (New Grad) - India Cisco CAG UHR (Evergreen) in Bengaluru, India. Level rates it ; you can apply on Cisco.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- Level classifies it as a junior role.
- Level lists 1,400+ other open roles at Cisco.
- The role was posted in the last few days.
AI in this role
Meet the Team
Come join the Cisco Silicon One team and participate in the design and verification of leading-edge multimillion gate ASICs. Cisco Silicon One is an industry leading Networking Silicon used in all the core Cisco products. These silicon chips are used to build high density, high speed multi-protocol switches and routers for next generation AI networking infra, Datacenters, Campus & Service provider networks.
Your Impact
Our creative and talented Physical Design team in Bangalore, India. As a member of this team, you will be involved in creating next generation state-of-the-art networking chips in advanced process node. You will drive the backend process through the entire RTL2GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
ASIC Physical Design Engineer
Join our physical design team leading-edge multimillion gate ASICs with state-of-the-art sub 5/3/2 nm technologies. If you enjoy solving complex technical challenges and want to build the silicon that powers Cisco's global networking products, this is the right role for you.
What You’ll Bring:
- Eligibility: The requirement is for 2027 graduates only.
- Project Management: Ability to manage multiple tasks and work toward long-term goals.
- Engineering Fundamentals: Solid understanding of engineering fundamentals, digital design fundamentals, and technical problem-solving skills.
- Collaboration: Experience in establishing and sustaining strong relationships with the extended team.
- Communication: Excellent communication skills (verbal and written).
- PD Knowledge: As a Physical Design Engineer, you need a strong grasp of digital design, CMOS technology, VLSI principles, timing, and power fundamentals. Comfortable navigating the complete RTL to GDSII flow, spanning logic synthesis and floorplanning through placement, clock tree synthesis, routing, static timing analysis, and physical verification signoff. It is also crucial to understand key metrics like setup and hold timing, clock skew, congestion, IR drop, electromigration, DRC, LVS, PVT corners, and SDC constraints. Finally, having solid scripting skills is essential for automating workflows and streamlining the entire design process.
• Team-player, can-do attitude will work well in a group environment while still being able to contribute on an individual basis and you will find that you'll have lots of fun and thrive in this environment if you enjoy being challenged, learning new ideas, and push yourself to achieve aggressive technology goals.
Join our team to design and verify leading-edge multimillion gate ASICs. If you enjoy solving complex technical challenges and want to build the silicon that powers Cisco's global networking products, this is the right role for you.
What You’ll Bring:
- Eligibility: The requirement is for 2027 graduates only.
- Project Management: Ability to manage multiple tasks and work toward long-term goals.
- Engineering Fundamentals: Solid understanding of engineering fundamentals, digital design fundamentals, and technical problem-solving skills.
- Collaboration: Experience in establishing and sustaining strong relationships with the extended team.
- Communication: Excellent communication skills (verbal and written).
- Design/Verification Knowledge: Knowledge of hardware design and test/verification environments built using an object-oriented framework in UVM, drawing on coursework in advanced data structures, algorithms, and design patterns, along with languages such as SystemVerilog HDL, C, C++, and Python.
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Disclaimer
To ensure that we hire the best talent in the right way, we follow a strict hiring process and recently, Cisco has been made aware of fraudulent recruiters claiming to be from the company. Please be advised that any communication from Cisco about careers will:
- be in direct response to an application you have submitted through the company career site
- begin with screening or an interview
- originate from a Cisco email address, and
- be conducted across email, phone, or WebEx
Cisco will never make a job offer without conducting an interview process or ask you for money in any way. If you have been requested to apply for a role or have received an offer from a site other than https://careers.cisco.com or cisco.wd5.myworkday.com, do not provide any personal identifying information, including your Aadhaar or other personal identifying number, birth certificate, banking information, driver's license, or passport.
If you are the target of a recruiting scam, consider filing a report with your local law enforcement authorities. Cisco bears no responsibility, and cannot be held liable, for any claims, damages, expenses, or other inconvenience resulting from or in any way connected to recruiting scams.
How we rate this
ASIC Engineer – (New Grad) - India Cisco CAG UHR (Evergreen) at Cisco rates 34 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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