DFT Intern

Etched is hiring a DFT Intern in San Jose, United States. Level rates it ; you can apply on Etched.

Level's read on this job

Level rates this role Little AI ●○○○: aI is not part of the work.
Level classifies it as an internship.
Level lists 114 other open roles at Etched.

AI in this role

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Spring '27, and Summer '27 interns.

You may be a good fit if you have

Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with a hardware description language (Verilog or SystemVerilog)
Exposure to ASIC or SoC design concepts
Familiarity with digital logic design fundamentals
Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)
Familiarity with scripting in Python, Tcl, or another language
Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with

Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression
Experience with Tessent or similar DFT tooling
Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)
Exposure to DFT flow automation or regression infrastructure
Familiarity with clocking and reset schemes

We encourage you to apply even if you do not believe you meet every single qualification.

Program details

12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com.

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

How we rate this

DFT Intern at Etched rates 11 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.