Mixed Signal Circuit Design Coop

Nokia is hiring a Mixed Signal Circuit Design Coop. Level rates it ; you can apply on Nokia.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Level lists 576 other open roles at Nokia.

AI in this role

Number of Position(s): 2
Duration: 4+ months
Dates: January 2027 - May 2027
Location: Onsite in San Jose, CA

Educational Requirements

Currently a candidate for a master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US.

Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs
Create the layout floor plans to optimize the overall performance
Exploring the trade-offs of the different circuit topologies

Familiarity with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
Familiarity with analog / mixed signal IPs or chips in deep submicron CMOS technologies.
Good understanding of device physics and the impacts of layout effects;
Familiarity with behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS

How we rate this

Mixed Signal Circuit Design Coop at Nokia rates 17 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.