Senior ASIC Verification Engineer - PMU

NVIDIA is hiring a Senior ASIC Verification Engineer - PMU in Shanghai, China. Level rates it ; you can apply on NVIDIA.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Tools and skills the posting cites include Risc V, Rtl and asic verification.
Level classifies it as a senior role.
Level lists 2,700+ other open roles at NVIDIA.

AI in this role

Design and verify next-generation power management units for AI datacenters using RTL and RISC-V.

risc-vrtl

asic-verificationrtl-designlow-power-design

As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in optimizing chip performance and efficiency in both idle and active scenarios. The PMU IP consists of a RISC-V core and custom-designed control logic. It collects and processes data from the entire chip, working in tandem with software running on the RISC-V core to determine optimal operating points. We are seeking a Senior ASIC Engineer who can help architect the next generation PMU for AI datacenter.

What you’ll be doing:

Collaborate with the production SW team and power arch team to define the architecture/micro-architecture for various power features.
Learn how PMU's function impacts the system and support the silicon debug.
Implement the micro-architecture to RTL design.

What we need to see:

BS / MS in electrical / computer engineering.
3+ years working experience, with preference given to those with MS or equivalent experience.
Strong communication skills and proficient oral English since this role require frequent communication with external teams mainly in USA and India.
Familiar with frontend ASIC design.

Ways to stand out from the crowd:

Experience on active power/low power design.
Play similar role in other system-level control features if not power related.

How we rate this

Senior ASIC Verification Engineer - PMU at NVIDIA rates 20 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior ASIC Verification Engineer - PMU is an open job at NVIDIA.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in China, Shanghai.
The job was posted on July 31, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Asic VerificationRtl DesignLow Power DesignRisc VRtl

Questions you could be asked

Tell me about a project where asic verification was part of your work. What did you do?
Tell me about a project where rtl design was part of your work. What did you do?
Tell me about a project where low power design was part of your work. What did you do?
What's a project where you used Risc V hands-on?
Walk me through how you've used Rtl in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Asic Verification, Rtl Design, Low Power Design, Risc V, and Rtl. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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