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Senior Chip Design Engineer, Nitro Chip Design Team

Amazon is hiring a Senior Chip Design Engineer, Nitro Chip Design Team in Tel Aviv, Israel. Level rates it ; you can apply on Amazon.

Level's read on this job

  • Works on AI ●●●○ is how Level rates this role: the daily work is on AI products, without building the model.
  • The posting mentions Trainium, Graviton and Nitro among its tools and skills.
  • Level classes it as a senior role.
  • Amazon has 20,000+ other open roles on Level.

AI in this role

Amazon's Annapurna Labs is looking for a Senior Chip Design Engineer to work on custom silicon including ML accelerators and cloud management controllers.

TrainiumGravitonNitro
rtl-designchip-designasicveriloghardware-architecture
Annapurna Labs, an Amazon team, designs and delivers high-end, custom silicon at the heart of AWS. Our chips don't just support the cloud; they define it. From Trainium, the purpose-built ML accelerator driving the next wave of AI innovation, to Graviton, the Arm-based server processor redefining price-performance for compute workloads, to Nitro, the advanced network and cloud management controller that underpins every AWS instance, Annapurna's products set the standard for the industry.

We're looking for an exceptional senior Chip Design Engineer to join our Nitro team and help shape what comes next. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match- powering hundreds of thousands of businesses across 190 countries.

If you want to build silicon that leads the cloud world, this is where it happens.

As a Senior Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers AWS at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

Watch these videos to learn more about Annapurna Labs and the Nitro project:

Watch these videos to learn more about Annapurna Labs and the Nitro project:
AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0
AWS re:Invent 2025 - Deep Dive into the AWS Nitro System https://www.youtube.com/watch?v=cD1mNQ9YbeA

Key job responsibilities
* Full ownership of one or more IPs within the product:
Micro-architecture definition
RTL coding and debug
Synthesis and timing closure
Sign-off before tape-out
* Supporting the Verification and Emulation teams: Test plan development, coverage review
* Ensuring the chip meets quality and reliability standards
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical Design



Basic qualifications

- 6+ years of experience in chip design
- Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog)
- Scripting expertise in C*, Perl, Python, or TCL
- BSc in Computer/Electrical Engineering
- Strong communication and collaboration skills
- Strong leadership skills and ability to own complex units

Preferred qualifications

- Strong knowledge of protocols (AXI, CHI, DDR, Networking, PCIe)
- Experience with Network-on-Chip (NOC) architecture
- knowledge with coherent and non-coherent fabric design
- Comprehensive SoC development cycle expertise (Synthesis, STA, CDC, Lint)
- Knowledge of Design Automation tools and techniques
- Advanced degree in related technical field

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

How we rate this

Senior Chip Design Engineer, Nitro Chip Design Team at Amazon rates 60 out of 100 for how much of the daily work is AI. That makes it Works on AI (AI Level 3 of 4). The level is about AI in the job, not seniority.

Classification

Works on AI. The daily work is on AI products, without building the model.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Rtl DesignChip DesignAsicVerilogHardware ArchitectureTrainiumGravitonNitro

Questions you could be asked

  1. Tell me about a project where rtl design was part of your work. What did you do?
  2. Tell me about a project where chip design was part of your work. What did you do?
  3. Tell me about a project where asic was part of your work. What did you do?
  4. Tell me about a project where verilog was part of your work. What did you do?
  5. Tell me about a project where hardware architecture was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Rtl Design, Chip Design, Asic, Verilog, and Hardware Architecture. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
  • Show where AI is part of your daily process, not a one-off project. This role expects it to be a running habit.

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