Senior Chip Design Verification Engineer

NVIDIA is hiring a Senior Chip Design Verification Engineer in Tel Aviv, Israel. Level rates it ; you can apply on NVIDIA.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
The posting mentions System Verilog, UVM and rtl verification among its tools and skills.
Level classes it as a senior role.
NVIDIA has 2,700+ other open roles on Level.

AI in this role

Design and execute RTL verification for power management and performance IPs in next-generation silicon devices.

system-veriloguvm

rtl-verificationchip-designhardware-verification

We are looking to hire a Senior Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is dynamic and challenging as our employees are currently working on innovative, next-generation devices at the forefront of technology. Daily work involves all aspects of chip development and close collaboration with Design and Architecture teams.

What you will be doing:

Join a combined design and verification team for performance and power management related IPs.
Build ref models, verify and simulate according to specifications and performance requirements.
Work closely with multiple teams within the organizations such as Architecture, Micro- Architecture and design.

What we need to see:

5+ years of proven experience in RTL Verification.
B.SC./ M.SC. in Electrical Engineering or Computer Engineering.
Deep and vast experience with System-Verilog UVM.
A great teammate with good communication and interpersonal skills.

NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you.

How we rate this

Senior Chip Design Verification Engineer at NVIDIA rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior Chip Design Verification Engineer is an open job at NVIDIA.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in Israel, Tel Aviv.
The job was posted on August 31, 2026.
Seniority: senior.
Applications are handled by NVIDIA. Apply on NVIDIA

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Rtl VerificationChip DesignHardware VerificationSystem VerilogUVM

Questions you could be asked

Tell me about a project where rtl verification was part of your work. What did you do?
Tell me about a project where chip design was part of your work. What did you do?
Tell me about a project where hardware verification was part of your work. What did you do?
What's a project where you used System Verilog hands-on?
Walk me through how you've used UVM in your day-to-day work.

Adapt your resume

List these exact terms on your resume: Rtl Verification, Chip Design, Hardware Verification, System Verilog, and UVM. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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