Senior Design Verification Engineer

Intel is hiring a Senior Design Verification Engineer in Bengaluru, India. Level rates it ; you can apply on Intel.

Level's read on this job

On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
Tools and skills the posting cites include SystemVerilog, Ovm and UVM.
Level classifies it as a senior role.
Level lists 877 other open roles at Intel.
The role was posted within the past week.

AI in this role

Develop and execute IP design verification plans using SystemVerilog and UVM for advanced computing systems.

SystemVerilogOvmUVM

design-verificationrtlip-verificationpciecxl

Job Details:

Job Description:

The Role and Impact:
Join Intel as an Senior IP Design Verification Engineer for the Silicon Chassis team and play a critical role in shaping the future of cutting-edge technology. In this role, you will contribute to the development and verification of Intellectual Property (IP) logic, ensuring that our designs meet rigorous specifications and exceed industry standards. As a key member of the design verification team, you will collaborate with architects, RTL developers, and physical design teams to validate complex features and create robust, high-quality products. Your work will directly impact Intel's ability to deliver innovative solutions that power the world's most advanced computing systems.

Key Responsibilities:
- Develop and execute detailed verification plans to confirm IP logic adheres to microarchitecture specifications.
- Create and maintain test benches and verification environments using best-in-class methodologies such as OVM and UVM.
- Perform functional and system-level simulations to identify and debug issues, ensuring coverage and compliance with requirements.
- Root cause failing tests and implement corrective measures to resolve design issues.
- Collaborate with cross-functional teams to improve verification strategies and ensure optimal integration of complex architectural and microarchitectural features.
- Analyze power and timing impacts during verification to support overall design optimization.
- Document verification plans, methodologies, and results, and lead technical reviews to refine and enhance verification frameworks.
- Maintain and enhance existing verification infrastructure, contributing to the evolution of methodologies and tool flows.

Qualifications:

Minimum Qualifications:
- Proficiency in hardware simulation, SystemVerilog, and advanced verification methodologies such as OVM and UVM.
- Strong expertise in developing and executing IP test plans and creating detailed verification environments.
- Solid understanding of interconnect/Fabric/NOC and bus protocols such as AMBA AXI/ACE/CHI, PCIe, or CXL, and working knowledge of cache coherency concepts.
- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
- 8+ years of experience with a Bachelor's degree, or 6+ years with a Master's degree, focusing on IP-level design verification and Subsystem verification.

Preferred Qualifications:
- Experience with Design for Verification (DFV) techniques and methodologies.
- Demonstrated ability to drive technical reviews and collaborate effectively with architects and design teams.
- Familiarity with emerging trends in verification technologies and a passion for innovation in the field.

Intel is committed to fostering a culture of innovation, inclusion, and excellence. If you are excited about solving complex technical challenges and making a lasting impact, we encourage you to apply and be part of our journey to shape the future of technology.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

How we rate this

Senior Design Verification Engineer at Intel rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

●●●● Builds AI80 to 100
●●●○ Works on AI60 to 79
●●○○ Uses AI40 to 59
●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Key facts

Senior Design Verification Engineer is an open job at Intel.
Level rates this role AI Level 1 of 4: Little AI.
The role is based in India, Bangalore.
The job was posted on November 11, 2026.
Seniority: senior.
Applications are handled by Intel. Apply on Intel

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Design VerificationRtlIp VerificationPcieCxlSystemVerilogOvmUVM

Questions you could be asked

Tell me about a project where design verification was part of your work. What did you do?
Tell me about a project where rtl was part of your work. What did you do?
Tell me about a project where ip verification was part of your work. What did you do?
Tell me about a project where pcie was part of your work. What did you do?
Tell me about a project where cxl was part of your work. What did you do?

Adapt your resume

List these exact terms on your resume: Design Verification, Rtl, Ip Verification, Pcie, and Cxl. An applicant tracking system matches the wording, not the idea.
Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

Get your CV reviewed before you apply

Send your CV and the role you want next. Your review arrives by email within 3 days.

Get a free CV review Check your resume with the ATS resume checker