Senior Electronics Design Engineer - FPGA & Digital Design (Open also to Protected Categories, Law 68/99)
AI in this role
FUNCTION: Senior Electronics Design Engineer - FPGA & Digital Design
RELATED SERVICE/UNIT: Identity and Biometric Solutions
Main mission
To provide deep expertise in FPGA and digital design, strengthening the technical
capability of the Electronics domain and evolving the design approach for the digital part of our document readers and biometric scanners. To deliver robust and scalable FPGA architectures that meet product performance, reliability, and
schedule requirements
Specific responsibilities
- Define FPGA architecture and detailed design specifications from system requirements
- Design, implement, and maintain RTL in VHDL / Verilog / SystemVerilog
- Develop and execute the verification strategy - verification plan, testbenches, and simulation environments; formal verification where applicable
- Perform synthesis, place-and-route, timing analysis, and timing closure
- Integrate and validate product interfaces: sensor interfaces (MIPI CSI-2, SLVS-EC), PCIe, DDR3/4/5, Ethernet, UART/SPI/I2C
- Implement image/streaming data processing along the sensor data path on FPGA
- Optimize FPGA resource utilization, power consumption, and performance
- Support board bring-up, debugging, and system integration together with electronics and board-design engineers
- Develop automation scripts (Python, Tcl, Bash)
- Document design decisions, verification results, and engineering processes
- Participate in technical planning, risk assessment, and project execution activities
- Evaluate and introduce current FPGA practices, tools, and technologies to improve development efficiency and product quality
- Promote engineering practices and technical standards within the domain
Education
Bachelor's or Master's degree in Electronics, Electrical/Computer Engineering, or a related discipline
Experience Level
Proven experience (8+ years) of FPGA design and development, spanning the full cycle: architecture through timing closure and hardware validation
Competences
Technical / functional skills:
- Strong command of RTL (VHDL / Verilog / SystemVerilog) and verification methodology
- Solid grounding in core digital-design concepts:
- Finite state machines
- Clock domain crossing
- Pipelining
- Synchronization
- Memory architectures
- Experience with Altera FPGA development tools:
- Quartus Prime
- ModelSim/QuestaSim
- Experience with image / streaming data processing on FPGA (sensor data path)
- Hands-on experience with board-level interfaces: PCIe, DDR, sensor interfaces
- Experience with board bring-up and system integration, including lab equipment (oscilloscopes, logic and protocol analyzers)
- Experience automating design flows (Python / Tcl / Bash)
- Experience with image-sensor interfaces (MIPI CSI-2, SLVS-EC)
- Experience with SoC FPGA devices (e.g. Altera SoC FPGAs) and embedded/firmware development
How we score this
Senior Electronics Design Engineer - FPGA & Digital Design (Open also to Protected Categories, Law 68/99) at Thales scores 32 out of 100 on AI centrality, which makes it AI Level 1 of 4 (Little AI) on this board. The level measures how much of the work is AI, not seniority.
AI Level 1. The work itself involves no AI, or AI only appears as scenery, such as a company tagline.
- AI Level 480 to 100
- AI Level 360 to 79
- AI Level 240 to 59
- AI Level 10 to 39
Bands come from how often the tools, models and workflows of the role are named in the posting itself. Open the description and count.
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