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Silicon Photonics Packaging Product Engineer

Cisco is hiring a Silicon Photonics Packaging Product Engineer in Taipei, Taiwan. Level rates it ; you can apply on Cisco.

Level's read on this job

  • On Level's scale, this role is Little AI ●○○○: aI is not part of the work.
  • Tools and skills the posting cites include silicon photonics, dfm and npi.
  • Level classifies it as a mid-level role.
  • Level lists 1,400+ other open roles at Cisco.

AI in this role

Silicon Photonics Packaging Product Engineer to support optical transceiver components from NPI to high-volume manufacturing.

silicon-photonicsdfmnpiwafer-fabricationpackaging

Meet the Team

Optics Operations Product Engineering team partners with cross-functional team of development engineers to design and sustain Optical transceiver components and modules throughout their product lifecycle. Product Engineers are self-motivated, result oriented, and strong-minded engineers who embrace creativity and new ways of thinking to deliver innovative solutions.

Your Impact

Optics Operations is an organization that enables and accelerates innovation to create an unrivaled customer experience & competitive advantage for Cisco through end-to-end operation leadership and product lifecycle management. In this role, you will be a key Optics Operations Engineering team member supporting the Cisco Optics Operations next generation product portfolio.

Role & Responsibilities:

  • Responsible for taking Silicon Photonics wafer & chip level packaging and assembly product from NPI to HVM release with OSAT partner.
  • Work in collaboration with Engineering and Technology & Quality teams to set SYL/SBL & other statistical methods to characterize and optimize qualified optical packaging assembly processes, make decisions on innovative changes to improve yields and product quality
  • Work in collaboration with Technology & Quality team to support new OSAT supplier engagement and introduction of new optical packaging product technology
  • Drive the characterization of NPI product performances and yield including benchmark correlation to meet and/or exceed product cost targets
  • Work in collaboration with Engineering and Technology & Quality teams to drive DFx for optical packaging design and assembly.
  • Responsible for reviewing and monitoring ETest/WAT data to proactively drive resolution to critical yield issues
  • Work in collaboration with Design team & Test Engineering to stabilize and improve product screening at wafer-probe and package levels.

Minimum Qualifications:

  • MS minimum/PhD preferred degree in Electrical Engineering, physics or material science or equivalent educational background
  • 5+ years of hands-on experience in chip on wafer (CoW) and CoC (Chip on Chip) wafer processing and assembly processes resulting in quantifiable improvements in quality, yield, & cost.
  • Proven track record of transitioning products from NPI to High volume production at OSAT suppliers
  • Strong knowledge of various wafer processing and flip chip assembly equipment
  • Experience with design for manufacturability (DFM) during early product development.
  • Strong Analytical skills & experience with troubleshooting and JMP scripting, Python, or AI models for automated yield prediction and monitoring
  • Strong written, verbal, and interpersonal skills with experience presenting to senior level leadership.

Desired Skills:

  • Solid understanding of manufacturing process, related to semiconductor assembly and optical module manufacturing
  • Experience with Cu micro bump processing and flip chip assemblies and TSV technologies
  • Knowledge of post CMOS back end assembly and packaging process technologies

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

How we rate this

Silicon Photonics Packaging Product Engineer at Cisco rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Silicon PhotonicsDfmNpiWafer FabricationPackaging

Questions you could be asked

  1. Tell me about a project where silicon photonics was part of your work. What did you do?
  2. Tell me about a project where dfm was part of your work. What did you do?
  3. Tell me about a project where npi was part of your work. What did you do?
  4. Tell me about a project where wafer fabrication was part of your work. What did you do?
  5. Tell me about a project where packaging was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Silicon Photonics, Dfm, Npi, Wafer Fabrication, and Packaging. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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