AmazonSr. DFT Design Engineer, AWS Machine Learning Acceleration
Amazon is hiring a Sr. DFT Design Engineer, AWS Machine Learning Acceleration in Austin, United States. It pays $185k-$250k a year and Level rates it ; you can apply on Amazon.
Level's read on this job
- Level rates this role Builds AI ●●●●: the job is building AI systems.
- The posting mentions Atpg, Jtag and Mbist among its tools and skills.
- Level classes it as a senior role.
- Amazon has 20,000+ other open roles on Level.
AI in this role
Design and optimize advanced DFT architectures for AWS machine learning acceleration custom SoCs.
Key job responsibilities
• Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
• Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
• Act as the primary point of contact for cross-functional stakeholders (PD, Architecture, and Product Engineering) to align schedules and goals
• Mentor and develop junior engineers through code reviews, methodology training, and technical guidance
• Manage project timelines and deliverables, ensuring high-quality DFT implementation from RTL through Silicon bring-up
Basic qualifications
- Bachelor's degree in computer science, electrical engineering, or related field
- 5+ years of practical semiconductor ASIC design work including owning end to end design of major SOC blocks experience
- Knowledge about industry standard tools and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- Experience with automation script development
Preferred qualifications
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
- Experience with modern ASIC/FPGA design and verification tools
- Experience with SOC bring-up and post-silicon validation
- MS degree in computer science, electrical engineering, or related field
- Experience with gate-level testing and multi-clock design practices (CDC)
- Good breadth of knowledge in chip design from micro-architecture through physical design
- Good knowledge of design verification (DV) simulation methodologies
- Strong programming and scripting skills in Perl, Python or Tcl
- Experience with industry standard DFT/SCAN/ATPG tools
- Experience with STA constraints development and analysis for DFT modes
- Practical experience with silicon debug
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, TX, Austin - 185,200.00 - 250,000.00 USD annually
How we rate this
Sr. DFT Design Engineer, AWS Machine Learning Acceleration at Amazon rates 85 out of 100 for how much of the daily work is AI. That makes it Builds AI (AI Level 4 of 4). The level is about AI in the job, not seniority.
Builds AI. The job is building AI systems.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where asic design was part of your work. What did you do?
- Tell me about a project where dft was part of your work. What did you do?
- Tell me about a project where rtl was part of your work. What did you do?
- Tell me about a project where soc was part of your work. What did you do?
- Tell me about a project where hardware verification was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Asic Design, Dft, Rtl, Soc, and Hardware Verification. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
- Lead with what you built, trained or shipped. This role is judged on the AI system itself, not the tools around it.
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