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Samsung Electronics

STD Cell QA Engineer

Samsung Electronics is hiring an STD Cell QA Engineer in Bengaluru, India. Level rates it ; you can apply on Samsung Electronics.

Level's read on this job

  • Level rates this role Little AI ●○○○: aI is not part of the work.
  • The posting mentions standard cell design, qa engineering and cmos among its tools and skills.
  • Level classes it as a senior role.
  • Samsung Electronics has 592 other open roles on Level.

AI in this role

Perform standard cell circuit design, verification, and PPA optimization for high-performance semiconductor components.

standard-cell-designqa-engineeringcmoscircuit-simulationppa-optimization

Position Summary

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

  • Strong knowledge and hands-on experience in QA methodologies for standard cell libraries, including test plan development, regression testing, and post-layout verification
  • 4 to 13 years of experience in Standard Cell Circuit design of high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, and clock cells.
  • Strong knowledge and hands-on experience in developing environments and extracting post-layout netlists.
  • Good understanding of CMOS device characteristics, design rules, latch-up, and electro migration.
  • Proficiency in digital circuit simulation, design and optimization for better PPA.
  • Hands-on experience in statistical/variation analysis.
  • Contributing to the creation of cutting-edge semiconductor technologies that power a wide range of applications.
  • Enhancing the performance and efficiency of standard cell circuits, impacting the overall quality of our products.
  • Driving innovation in power optimization and clock cell design, leading to more energy-efficient solutions.

Skills and Qualifications

Experience – 4 to 13 Years of experience

Qualifications

  • B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

How we rate this

STD Cell QA Engineer at Samsung Electronics rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.

Classification

Little AI. AI is not part of the work.

  1. ●●●● Builds AI80 to 100
  2. ●●●○ Works on AI60 to 79
  3. ●●○○ Uses AI40 to 59
  4. ●○○○ Little AI0 to 39

Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.

Prepare for this job

Built from this posting and from similar jobs on Level.

Skills and AI tools this role asks for

Standard Cell DesignQa EngineeringCmosCircuit SimulationPpa Optimization

Questions you could be asked

  1. Tell me about a project where standard cell design was part of your work. What did you do?
  2. Tell me about a project where qa engineering was part of your work. What did you do?
  3. Tell me about a project where cmos was part of your work. What did you do?
  4. Tell me about a project where circuit simulation was part of your work. What did you do?
  5. Tell me about a project where ppa optimization was part of your work. What did you do?

Adapt your resume

  • List these exact terms on your resume: Standard Cell Design, Qa Engineering, Cmos, Circuit Simulation, and Ppa Optimization. An applicant tracking system matches the wording, not the idea.
  • Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.

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