IntelTD Memory Quality and Reliability PhD Intern
Intel is hiring a TD Memory Quality and Reliability PhD Intern. It pays $121k a year and Level rates it ; you can apply on Intel.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- Tools and skills the posting cites include Python, Jmp and data analysis.
- Level classifies it as an internship.
- Level lists 807 other open roles at Intel.
- The role was posted in the last few days.
AI in this role
Analyze memory quality and reliability data to support advanced semiconductor technology development as a PhD intern.
Job Description:
About the Team
The Technology Development (TD) Quality and Reliability organization plays a critical role in enabling the successful deployment of next-generation semiconductor technologies through silicon-based quality, reliability, and technology readiness assessments.
The Memory Quality and Reliability team works closely with Design, Device Engineering, Product Development Engineering (PDE), and Yield organizations to develop, characterize, and certify SRAM, Register File (RF), and Fuse technologies for advanced process nodes. The team supports key technology certification and PDK release milestones through memory characterization, silicon data analysis, predictive modeling, and risk assessment.
Role Overview
As a TD Memory Quality and Reliability Intern, you will collaborate with experienced engineers to evaluate advanced memory technologies and help drive technology readiness for future Intel Foundry process nodes. This role offers hands-on experience in memory characterization, silicon data analytics, statistical modeling, and semiconductor technology development.
You will contribute to projects that support technology certification decisions by analyzing silicon data, developing predictive models, and assessing memory performance across various operating conditions.
Responsibilities
Responsibilities may include, but are not limited to:
- Analyze silicon characterization data from SRAM, Register File (RF), and Fuse memory test structures to identify performance trends, variability, and potential risks.
- Support memory characterization activities across voltage, temperature, and process conditions.
- Perform data analysis, visualization, and reporting using Python, JMP, or similar analytical tools.
- Develop and enhance statistical models for Vmin/Vmax prediction and technology readiness assessments.
- Support Silicon-to-Simulation (Sil2Sim) correlation studies and memory characterization methodologies.
- Generate technical reports and contribute to technology certification reviews.
- Collaborate with cross-functional teams including Design, Device Engineering, Process Integration, Product Development Engineering, and Yield Engineering.
- Assist with risk assessment activities and technology certification milestones.
- Present data-driven findings and recommendations to engineering teams and project stakeholders.
Qualifications:
Minimum Qualifications
- Currently pursuing a Ph.D. in Electrical Engineering or a related field.
- Basic knowledge of semiconductor devices, microelectronics, or integrated circuit design.
- Programming or scripting experience using Python or similar languages.
- Experience analyzing technical, scientific, or research data through academic projects, research activities, or previous internships.
- Strong academic performance with a cumulative GPA of 3.0 or higher required.
Preferred Qualifications
Coursework, research, or experience in one or more of the following areas:
- SRAM or memory technologies
- Semiconductor device physics
- VLSI design
- Statistics, machine learning, or data science
- Semiconductor process technology
Experience with:
- Python, Pandas, and NumPy
- JMP or other statistical analysis tools
- Data visualization and statistical modeling techniques
- Large-scale data analysis and predictive modeling
Additional experience in memory architectures, silicon characterization, reliability assessment, or semiconductor test methodologies is highly desirable.
What You Will Learn
During this internship, you will gain exposure to:
- Advanced SRAM, RF, and Fuse memory technologies
- Memory characterization and certification methodologies
- Silicon data analytics and statistical modeling techniques
- Vmin/Vmax evaluation and predictive model development
- Technology qualification and certification processes
- Cross-functional semiconductor technology development workflows
- Silicon-based decision making for technology readiness and risk assessment
Job Type:
Student / InternShift:
Shift 1 (United States of America)Primary Location:
US, California, FolsomAdditional Locations:
US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $120,898.00-120,902.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.How we rate this
TD Memory Quality and Reliability PhD Intern at Intel rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where data analysis was part of your work. What did you do?
- Tell me about a project where statistical modeling was part of your work. What did you do?
- Tell me about a project where semiconductor device characterization was part of your work. What did you do?
- Tell me about a project where predictive modeling was part of your work. What did you do?
- Walk me through how you've used Python in your day-to-day work.
Adapt your resume
- List these exact terms on your resume: Data Analysis, Statistical Modeling, Semiconductor Device Characterization, Predictive Modeling, and Python. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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