ASIC Design Engineer, High Speed IO
NVIDIA is hiring an ASIC Design Engineer, High Speed IO in Bengaluru, India. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Little AI ●○○○ is how Level rates this role: aI is not part of the work.
- The posting mentions Usb, Ufs and Ethernet among its tools and skills.
- Level classes it as a mid-level role.
- NVIDIA has 2,700+ other open roles on Level.
- Posted within the past week.
AI in this role
Implement RTL and micro-architecture for high-speed I/O IPs in next-generation automotive chips.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are now looking for RTL Design engineers for our High Speed IO IP's deployed in Automotive chips. As one of the primary designers, you will be responsible for implementing USB, UFS, Ethernet or PCIE IP's for next generation Automotive chips. One should possess strong digital design and verification fundamentals.
What you'll be doing:
As a designer, be responsible for making architectural trade-offs based on feature/performance/power requirements, analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation. During the course of a project you would end up driving the following aspects of design for your unit:
Own micro-architecture and RTL development of design modules
Micro-architect features to meet performance, power and area requirements
Work with HW architects to define critical features
Work with verification teams to verify the correctness of implemented features
Partner with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
What we need to see:
BTech/MTech with 2+ years of experience in crafting complex Units and CPU/micro-controller based Sub-systems
Knowledge of security standards, protocols and system security architectures of modern SOC's would be a significant plus
Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams
Good debugging, analytical and problem solving skills
Great interpersonal skills and ability to work as an excellent teammate
We have some of the most brilliant and talented people in the world working for us. If you're creative and independent, with a genuine real passion for technology and improving the state of art, we want to hear from you! Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
#LI-Hybrid
How we rate this
ASIC Design Engineer, High Speed IO at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where asic design was part of your work. What did you do?
- Tell me about a project where digital design was part of your work. What did you do?
- Tell me about a project where micro architecture was part of your work. What did you do?
- Tell me about a project where rtl development was part of your work. What did you do?
- Tell me about a project where timing closure was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Asic Design, Digital Design, Micro Architecture, Rtl Development, and Timing Closure. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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