Senior Chip Design Engineer
NVIDIA is hiring a Senior Chip Design Engineer in Tel Aviv, Israel. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- The posting mentions Rtl, chip design and rtl design among its tools and skills.
- Level classes it as a senior role.
- NVIDIA has 2,700+ other open roles on Level.
AI in this role
Design and implement next-generation switch silicon chips and reference models for high-speed networking devices.
We are now looking for a Senior Chip Design Engineer for the Switch Silicon group.
As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation pioneering Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
- Work in a combined design and verification team which develops some of the switch silicon core units.
- Build reference models, verify and simulate chip blocks/entities according to specifications.
- Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
What we need to see:
- Proven experience in RTL design or RTL verification.
- 4+ years of relevant experience.
- Previous experience in networking - an advantage.
- B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
- A great teammate with good communication and social skills.
NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field.
How we rate this
Senior Chip Design Engineer at NVIDIA rates 0 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
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Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where chip design was part of your work. What did you do?
- Tell me about a project where rtl design was part of your work. What did you do?
- Tell me about a project where rtl verification was part of your work. What did you do?
- Tell me about a project where asic was part of your work. What did you do?
- Walk me through how you've used Rtl in your day-to-day work.
Adapt your resume
- List these exact terms on your resume: Chip Design, Rtl Design, Rtl Verification, Asic, and Rtl. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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