Senior STA Engineer
NVIDIA is hiring a Senior STA Engineer in Tel Aviv, Israel. Level rates it ; you can apply on NVIDIA.
Level's read on this job
- Level rates this role Little AI ●○○○: aI is not part of the work.
- The posting mentions Primetime, Tempus and Tcl among its tools and skills.
- Level classes it as a senior role.
- NVIDIA has 2,700+ other open roles on Level.
- Posted in the last few days.
AI in this role
Drive static timing analysis, timing closure, and signoff quality across complex ASIC and SoC designs at advanced process nodes.
NVIDIA is seeking a Physical Design and Timing Engineer to join our silicon implementation team. This role focuses on timing analysis, timing closure, and signoff quality across complex ASIC and SoC designs. You will work closely with physical design, front-end design, methodology, and CAD teams to drive robust implementation at advanced process nodes. This is a strong fit for an engineer who enjoys deep analysis, problem solving, and improving quality at block and full-chip levels.
What you’ll be doing:
- Drive static timing analysis and timing closure for block and/or full-chip designs.
- Develop, review, and debug timing constraints, scenarios, and signoff checks.
- Analyze setup, hold, noise, and variation-related timing issues and drive closure with cross-functional teams.
- Partner with physical design engineers on floorplan, CTS, route, ECO, and convergence activities.
- Review reports, identify root causes of violations, and recommend high-quality fixes with minimal design impact.
- Improve timing methodology, automation, and debug efficiency using Tcl, Perl, and/or Python.
What we need to see:
- B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or equivalent experience.
- 5+ years of experience in ASIC or SoC physical design, timing analysis, or implementation.
- Strong understanding of static timing analysis fundamentals, timing constraints, and timing closure.
- Hands-on experience with industry-standard EDA tools such as PrimeTime, ICC2, Innovus, Tempus, or equivalent.
- Experience debugging setup/hold violations, clocking issues, and ECO impacts.
- Solid scripting skills in Tcl plus familiarity with Perl or Python.
- Good communication skills and ability to work across design, CAD, and verification teams.
Ways to stand out from the crowd:
- Experience with advanced-node implementation and signoff.
- Knowledge of MMMC flows, SI, OCV/AOCV/POCV, and power-aware timing analysis.
- Experience improving timing methodology or developing reusable automation.
We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided a reasonable accommodation to participate in the job application or interview process, perform essential job functions, and receive other benefits and privileges of employment. Please contact us to request accommodation.
How we rate this
Senior STA Engineer at NVIDIA rates 10 out of 100 for how much of the daily work is AI. That makes it Little AI (AI Level 1 of 4). The level is about AI in the job, not seniority.
Little AI. AI is not part of the work.
- ●●●● Builds AI80 to 100
- ●●●○ Works on AI60 to 79
- ●●○○ Uses AI40 to 59
- ●○○○ Little AI0 to 39
Levels come from how often the tools, models and workflows of the role are named in the posting itself. Read the description and count the AI tools, models and workflows it names.
Prepare for this job
Built from this posting and from similar jobs on Level.
Skills and AI tools this role asks for
Questions you could be asked
- Tell me about a project where sta was part of your work. What did you do?
- Tell me about a project where static timing analysis was part of your work. What did you do?
- Tell me about a project where asic was part of your work. What did you do?
- Tell me about a project where physical design was part of your work. What did you do?
- Tell me about a project where timing closure was part of your work. What did you do?
Adapt your resume
- List these exact terms on your resume: Sta, Static Timing Analysis, Asic, Physical Design, and Timing Closure. An applicant tracking system matches the wording, not the idea.
- Attach one line of real, concrete experience to at least one of them. A tool named with nothing behind it rarely survives a human read.
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