Software Engineering jobs using SystemVerilog
183 live jobs match "Software Engineering jobs using SystemVerilog" right now. 29 use, work on, or build AI, not just mention it in the posting, and the median salary starts around $150,000 a year, and the most common tools are SystemVerilog, UVM, and Verilog.
New software engineering jobs using systemverilog by email
Broader searches
IN, KA, Bengaluru1w
systemveriloguvmfpga
India, Bengaluru1w
verilogsystemverilogspice
$164k-$232kUS, California, Santa Clara1w
systemverilog
$136k-$219kUS, CA, Santa Clara2w
systemveriloguvmpython+1
$196k-$311kUS, CA, Santa Clara2w
vivadoverilogsystemverilog+2
$191k-$254kWaltham, Massachusetts, United States2w
systemveriloguvmvhdl+1
Sunnyvale, California, United States of America3w
uvmsystemverilog
$175k-$280kPalo Alto, CA3w
verilogsystemverilog
$135k-$175kPalo Alto, CA3w
verilogsystemverilog
$116k-$190kUS, CA, Santa Clara3w
systemveriloguvmpython+1
$168k-$265kUS, CA, Santa Clara3w
systemveriloguvmatpg+3
Bristol, United Kingdom | Stockholm, Sweden3w
systemverilogverilogvhdl
$168k-$265kUS, CA, Santa Clara4w
verilogsystemverilog
$155k-$223kSan Jose, California, US2w
systemveriloguvmperl+5
$155k-$223kSan Jose, California, US2w
systemveriloguvmperl+1
Get new software engineering jobs using systemverilog by email
15 new software engineering jobs using systemverilog in the last 7 days, as of Nov 3, 2026. One email a week, only when a new one matches this page.
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Source: O*NET OnLine (U.S. Dept. of Labor): Software Developers (SOC 15-1252.00).