Software Engineering jobs using SystemVerilog
183 live jobs match "Software Engineering jobs using SystemVerilog" right now. 29 use, work on, or build AI, not just mention it in the posting, and the median salary starts around $150,000 a year, and the most common tools are SystemVerilog, UVM, and Verilog.
New software engineering jobs using systemverilog by email
Broader searches
India, Bengaluru4mo
cbashperl+3
$122k-$200kUS, California, Folsom1w
verilogsystemverilogrtl
IL, Haifa2w
systemverilogformal-verification
IL, Haifa2w
systemverilogformal-verification
$175k-$215kMountain View, CA, USARemote4mo
uvmsystemverilogpython
$144k-$192kBroomfield, Colorado, United States; Fort Collins, Colorado, United States3d
systemverilogvhdlaltera-toolchains
Ft. Collins, Colorado, United States of AmericaRemote6d
systemveriloguvm
$136k-$219kUS, CA, Santa Clara4w
uvmsystemverilogc+3
$100k-$167kUS, NC, Durham1mo
systemverilogcvcs+1
$100k-$167kUS, TX, Austin1mo
systemverilogvcsgdb+1
$185k-$250kUS, TX, Austin2mo
jaspergoldquesta-formalsystemverilog
SSIR, Goldstone, Bangalore, India5mo
verilogsystemverilogdesign-compiler+2
India, Bengaluru1d
claudecursoruvm+1
$168k-$265kUS, CA, Santa Clara1w
systemveriloguvmpython+1
CAD 125k-CAD 175kCanada, Toronto1w
systemveriloguvmpython+1
$122k-$200kUS, California, Folsom1w
systemverilogrtl
Get new software engineering jobs using systemverilog by email
15 new software engineering jobs using systemverilog in the last 7 days, as of Nov 3, 2026. One email a week, only when a new one matches this page.
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Source: O*NET OnLine (U.S. Dept. of Labor): Software Developers (SOC 15-1252.00).